forked from luck/tmp_suning_uos_patched
mmc: sdhci_am654: Enable tuning for SDR50
According to the SW tuning App note[1], tuning is required for all UHS speed modes. Tuning for SDR50 is not enabled in Capabilities by default so enable it from the CTL_CFG registers. [1] https://www.ti.com/lit/pdf/spract9 Signed-off-by: Faiz Abbas <faiz_abbas@ti.com> Link: https://lore.kernel.org/r/20200923105206.7988-7-faiz_abbas@ti.com Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -19,9 +19,11 @@
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/* CTL_CFG Registers */
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#define CTL_CFG_2 0x14
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#define CTL_CFG_3 0x18
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#define SLOTTYPE_MASK GENMASK(31, 30)
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#define SLOTTYPE_EMBEDDED BIT(30)
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#define TUNINGFORSDR50_MASK BIT(13)
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/* PHY Registers */
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#define PHY_CTRL1 0x100
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@ -646,6 +648,10 @@ static int sdhci_am654_init(struct sdhci_host *host)
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regmap_update_bits(sdhci_am654->base, CTL_CFG_2, SLOTTYPE_MASK,
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ctl_cfg_2);
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/* Enable tuning for SDR50 */
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regmap_update_bits(sdhci_am654->base, CTL_CFG_3, TUNINGFORSDR50_MASK,
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TUNINGFORSDR50_MASK);
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ret = sdhci_setup_host(host);
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if (ret)
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return ret;
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