forked from luck/tmp_suning_uos_patched
scsi: qla2xxx: Fix mailbox Ch erroneous error
commit 044c218b04503858ca4e17f61899c8baa0ae9ba1 upstream. Mailbox Ch/dump ram extend expects mb register 10 to be set. If not set/clear, firmware can pick up garbage from previous invocation of this mailbox. Example: mctp dump can set mb10. On subsequent flash read which use mailbox cmd Ch, mb10 can retain previous value. Link: https://lore.kernel.org/r/20210111093134.1206-6-njavali@marvell.com Cc: stable@vger.kernel.org Reviewed-by: Himanshu Madhani <himanshu.madhani@oracle.com> Signed-off-by: Quinn Tran <qutran@marvell.com> Signed-off-by: Nilesh Javali <njavali@marvell.com> Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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@ -202,6 +202,7 @@ qla24xx_dump_ram(struct qla_hw_data *ha, uint32_t addr, __be32 *ram,
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wrt_reg_word(®->mailbox0, MBC_DUMP_RISC_RAM_EXTENDED);
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wrt_reg_word(®->mailbox1, LSW(addr));
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wrt_reg_word(®->mailbox8, MSW(addr));
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wrt_reg_word(®->mailbox10, 0);
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wrt_reg_word(®->mailbox2, MSW(LSD(dump_dma)));
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wrt_reg_word(®->mailbox3, LSW(LSD(dump_dma)));
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@ -4277,7 +4277,8 @@ qla2x00_dump_ram(scsi_qla_host_t *vha, dma_addr_t req_dma, uint32_t addr,
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if (MSW(addr) || IS_FWI2_CAPABLE(vha->hw)) {
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mcp->mb[0] = MBC_DUMP_RISC_RAM_EXTENDED;
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mcp->mb[8] = MSW(addr);
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mcp->out_mb = MBX_8|MBX_0;
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mcp->mb[10] = 0;
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mcp->out_mb = MBX_10|MBX_8|MBX_0;
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} else {
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mcp->mb[0] = MBC_DUMP_RISC_RAM;
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mcp->out_mb = MBX_0;
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