ARM: PL011: add support for extended FIFO-size of PL011-r1p5

The latest r1p5-revision of the ARM PL011 UART has 32-byte FIFOs,
while all earlier ones have 16-byte FIFOs. This patch suggests
a way to set the FIFO-size correctly & flexibly by using a member
function named get_fifosize, rather than using the fifosize member
variable. The function takes the UARTPeriphID, and returns the
correct FIFO size.

Signed-off-by: Jongsung Kim <neidhard.kim@lge.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This commit is contained in:
Jongsung Kim 2013-04-15 14:45:25 +09:00 committed by Greg Kroah-Hartman
parent 5a65dcc04c
commit 78506f223a

View File

@ -73,32 +73,44 @@
/* There is by now at least one vendor with differing details, so handle it */ /* There is by now at least one vendor with differing details, so handle it */
struct vendor_data { struct vendor_data {
unsigned int ifls; unsigned int ifls;
unsigned int fifosize;
unsigned int lcrh_tx; unsigned int lcrh_tx;
unsigned int lcrh_rx; unsigned int lcrh_rx;
bool oversampling; bool oversampling;
bool dma_threshold; bool dma_threshold;
bool cts_event_workaround; bool cts_event_workaround;
unsigned int (*get_fifosize)(unsigned int periphid);
}; };
static unsigned int get_fifosize_arm(unsigned int periphid)
{
unsigned int rev = (periphid >> 20) & 0xf;
return rev < 3 ? 16 : 32;
}
static struct vendor_data vendor_arm = { static struct vendor_data vendor_arm = {
.ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8, .ifls = UART011_IFLS_RX4_8|UART011_IFLS_TX4_8,
.fifosize = 16,
.lcrh_tx = UART011_LCRH, .lcrh_tx = UART011_LCRH,
.lcrh_rx = UART011_LCRH, .lcrh_rx = UART011_LCRH,
.oversampling = false, .oversampling = false,
.dma_threshold = false, .dma_threshold = false,
.cts_event_workaround = false, .cts_event_workaround = false,
.get_fifosize = get_fifosize_arm,
}; };
static unsigned int get_fifosize_st(unsigned int periphid)
{
return 64;
}
static struct vendor_data vendor_st = { static struct vendor_data vendor_st = {
.ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF, .ifls = UART011_IFLS_RX_HALF|UART011_IFLS_TX_HALF,
.fifosize = 64,
.lcrh_tx = ST_UART011_LCRH_TX, .lcrh_tx = ST_UART011_LCRH_TX,
.lcrh_rx = ST_UART011_LCRH_RX, .lcrh_rx = ST_UART011_LCRH_RX,
.oversampling = true, .oversampling = true,
.dma_threshold = true, .dma_threshold = true,
.cts_event_workaround = true, .cts_event_workaround = true,
.get_fifosize = get_fifosize_st,
}; };
static struct uart_amba_port *amba_ports[UART_NR]; static struct uart_amba_port *amba_ports[UART_NR];
@ -2133,7 +2145,7 @@ static int pl011_probe(struct amba_device *dev, const struct amba_id *id)
uap->lcrh_rx = vendor->lcrh_rx; uap->lcrh_rx = vendor->lcrh_rx;
uap->lcrh_tx = vendor->lcrh_tx; uap->lcrh_tx = vendor->lcrh_tx;
uap->old_cr = 0; uap->old_cr = 0;
uap->fifosize = vendor->fifosize; uap->fifosize = vendor->get_fifosize(dev->periphid);
uap->port.dev = &dev->dev; uap->port.dev = &dev->dev;
uap->port.mapbase = dev->res.start; uap->port.mapbase = dev->res.start;
uap->port.membase = base; uap->port.membase = base;