forked from luck/tmp_suning_uos_patched
KVM: arm/arm64: vgic-new: Add CONFIG registers handlers
The config register handlers are shared between the v2 and v3 emulation, so their implementation goes into vgic-mmio.c, to be easily referenced from the v3 emulation as well later. Signed-off-by: Andre Przywara <andre.przywara@arm.com>
This commit is contained in:
parent
055658bf48
commit
79717e4ac0
@ -96,7 +96,7 @@ static const struct vgic_register_region vgic_v2_dist_registers[] = {
|
|||||||
vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
|
vgic_mmio_read_raz, vgic_mmio_write_wi, 8,
|
||||||
VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
|
VGIC_ACCESS_32bit | VGIC_ACCESS_8bit),
|
||||||
REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_CONFIG,
|
REGISTER_DESC_WITH_BITS_PER_IRQ(GIC_DIST_CONFIG,
|
||||||
vgic_mmio_read_raz, vgic_mmio_write_wi, 2,
|
vgic_mmio_read_config, vgic_mmio_write_config, 2,
|
||||||
VGIC_ACCESS_32bit),
|
VGIC_ACCESS_32bit),
|
||||||
REGISTER_DESC_WITH_LENGTH(GIC_DIST_SOFTINT,
|
REGISTER_DESC_WITH_LENGTH(GIC_DIST_SOFTINT,
|
||||||
vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
|
vgic_mmio_read_raz, vgic_mmio_write_wi, 4,
|
||||||
|
@ -276,6 +276,53 @@ void vgic_mmio_write_priority(struct kvm_vcpu *vcpu,
|
|||||||
}
|
}
|
||||||
}
|
}
|
||||||
|
|
||||||
|
unsigned long vgic_mmio_read_config(struct kvm_vcpu *vcpu,
|
||||||
|
gpa_t addr, unsigned int len)
|
||||||
|
{
|
||||||
|
u32 intid = VGIC_ADDR_TO_INTID(addr, 2);
|
||||||
|
u32 value = 0;
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i = 0; i < len * 4; i++) {
|
||||||
|
struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
|
||||||
|
|
||||||
|
if (irq->config == VGIC_CONFIG_EDGE)
|
||||||
|
value |= (2U << (i * 2));
|
||||||
|
}
|
||||||
|
|
||||||
|
return value;
|
||||||
|
}
|
||||||
|
|
||||||
|
void vgic_mmio_write_config(struct kvm_vcpu *vcpu,
|
||||||
|
gpa_t addr, unsigned int len,
|
||||||
|
unsigned long val)
|
||||||
|
{
|
||||||
|
u32 intid = VGIC_ADDR_TO_INTID(addr, 2);
|
||||||
|
int i;
|
||||||
|
|
||||||
|
for (i = 0; i < len * 4; i++) {
|
||||||
|
struct vgic_irq *irq = vgic_get_irq(vcpu->kvm, vcpu, intid + i);
|
||||||
|
|
||||||
|
/*
|
||||||
|
* The configuration cannot be changed for SGIs in general,
|
||||||
|
* for PPIs this is IMPLEMENTATION DEFINED. The arch timer
|
||||||
|
* code relies on PPIs being level triggered, so we also
|
||||||
|
* make them read-only here.
|
||||||
|
*/
|
||||||
|
if (intid + i < VGIC_NR_PRIVATE_IRQS)
|
||||||
|
continue;
|
||||||
|
|
||||||
|
spin_lock(&irq->irq_lock);
|
||||||
|
if (test_bit(i * 2 + 1, &val)) {
|
||||||
|
irq->config = VGIC_CONFIG_EDGE;
|
||||||
|
} else {
|
||||||
|
irq->config = VGIC_CONFIG_LEVEL;
|
||||||
|
irq->pending = irq->line_level | irq->soft_pending;
|
||||||
|
}
|
||||||
|
spin_unlock(&irq->irq_lock);
|
||||||
|
}
|
||||||
|
}
|
||||||
|
|
||||||
static int match_region(const void *key, const void *elt)
|
static int match_region(const void *key, const void *elt)
|
||||||
{
|
{
|
||||||
const unsigned int offset = (unsigned long)key;
|
const unsigned int offset = (unsigned long)key;
|
||||||
|
@ -136,6 +136,13 @@ void vgic_mmio_write_priority(struct kvm_vcpu *vcpu,
|
|||||||
gpa_t addr, unsigned int len,
|
gpa_t addr, unsigned int len,
|
||||||
unsigned long val);
|
unsigned long val);
|
||||||
|
|
||||||
|
unsigned long vgic_mmio_read_config(struct kvm_vcpu *vcpu,
|
||||||
|
gpa_t addr, unsigned int len);
|
||||||
|
|
||||||
|
void vgic_mmio_write_config(struct kvm_vcpu *vcpu,
|
||||||
|
gpa_t addr, unsigned int len,
|
||||||
|
unsigned long val);
|
||||||
|
|
||||||
unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev);
|
unsigned int vgic_v2_init_dist_iodev(struct vgic_io_device *dev);
|
||||||
|
|
||||||
#endif
|
#endif
|
||||||
|
Loading…
Reference in New Issue
Block a user