AcoSail/kernel_optimize_test
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pata_sis: implement laptop list and add ASUS A6K/A6U

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In ASUS A6K/A6U hdd is connected to SiS 96x via 40c cable, however it
is short cable and is UDMA66 capable.

tj: fixed if () conditionals
ah: fixed infinite loop

Signed-off-by: Jakub W. Jozwicki <jakub007@go2.pl>
Cc: Andreas Henriksson <andreas@fatal.se>
Signed-off-by: Tejun Heo <htejun@gmail.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
This commit is contained in:
Jakub W. Jozwicki J 2007-01-09 09:01:19 +09:00 committed by Jeff Garzik
parent babfb682c9
commit 7dcbc1f2c8
1 changed files with 30 additions and 2 deletions
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32
drivers/ata/pata_sis.c
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@ -43,6 +43,34 @@ struct sis_chipset {
up code later */ up code later */
}; };
struct sis_laptop {
u16 device;
u16 subvendor;
u16 subdevice;
};
static const struct sis_laptop sis_laptop[] = {
/* devid, subvendor, subdev */
{ 0x5513, 0x1043, 0x1107 }, /* ASUS A6K */
/* end marker */
{ 0, }
};
static int sis_short_ata40(struct pci_dev *dev)
{
const struct sis_laptop *lap = &sis_laptop[0];
while (lap->device) {
if (lap->device == dev->device &&
lap->subvendor == dev->subsystem_vendor &&
lap->subdevice == dev->subsystem_device)
return 1;
lap++;
}
return 0;
}
/** /**
* sis_port_base - return PCI configuration base for dev * sis_port_base - return PCI configuration base for dev
* @adev: device * @adev: device
@ -79,7 +107,7 @@ static int sis_133_pre_reset(struct ata_port *ap)
/* The top bit of this register is the cable detect bit */ /* The top bit of this register is the cable detect bit */
pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp); pci_read_config_word(pdev, 0x50 + 2 * ap->port_no, &tmp);
if (tmp & 0x8000) if ((tmp & 0x8000) && !sis_short_ata40(pdev))
ap->cbl = ATA_CBL_PATA40; ap->cbl = ATA_CBL_PATA40;
else else
ap->cbl = ATA_CBL_PATA80; ap->cbl = ATA_CBL_PATA80;
@ -127,7 +155,7 @@ static int sis_66_pre_reset(struct ata_port *ap)
/* Older chips keep cable detect in bits 4/5 of reg 0x48 */ /* Older chips keep cable detect in bits 4/5 of reg 0x48 */
pci_read_config_byte(pdev, 0x48, &tmp); pci_read_config_byte(pdev, 0x48, &tmp);
tmp >>= ap->port_no; tmp >>= ap->port_no;
if (tmp & 0x10) if ((tmp & 0x10) && !sis_short_ata40(pdev))
ap->cbl = ATA_CBL_PATA40; ap->cbl = ATA_CBL_PATA40;
else else
ap->cbl = ATA_CBL_PATA80; ap->cbl = ATA_CBL_PATA80;