forked from luck/tmp_suning_uos_patched
i7core_edac: Add more information about each active dimm
Thanks-to: Aristeu Rozanski <aris@redhat.com> for part of the code Signed-off-by: Mauro Carvalho Chehab <mchehab@redhat.com>
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b7c761512c
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@ -359,21 +359,18 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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{
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struct i7core_pvt *pvt = mci->pvt_info;
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struct csrow_info *csr;
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int i, csrow = 0;
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struct pci_dev *pdev = pvt->pci_mcr[0];
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int i, j, csrow = 0;
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enum edac_type mode;
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if (!pvt->pci_mcr[0])
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if (!pdev)
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return -ENODEV;
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/* Device 3 function 0 reads */
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pci_read_config_dword(pvt->pci_mcr[0], MC_CONTROL,
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&pvt->info.mc_control);
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pci_read_config_dword(pvt->pci_mcr[0], MC_STATUS,
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&pvt->info.mc_status);
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pci_read_config_dword(pvt->pci_mcr[0], MC_MAX_DOD,
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&pvt->info.max_dod);
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pci_read_config_dword(pvt->pci_mcr[0], MC_CHANNEL_MAPPER,
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&pvt->info.ch_map);
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pci_read_config_dword(pdev, MC_CONTROL, &pvt->info.mc_control);
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pci_read_config_dword(pdev, MC_STATUS, &pvt->info.mc_status);
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pci_read_config_dword(pdev, MC_MAX_DOD, &pvt->info.max_dod);
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pci_read_config_dword(pdev, MC_CHANNEL_MAPPER, &pvt->info.ch_map);
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debugf0("MC control=0x%08x status=0x%08x dod=0x%08x map=0x%08x\n",
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pvt->info.mc_control, pvt->info.mc_status,
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@ -399,7 +396,7 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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debugf0("Memory channel configuration:\n");
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for (i = 0; i < NUM_CHANS; i++) {
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u32 data;
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u32 data, value[8];
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if (!CH_ACTIVE(pvt, i)) {
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debugf0("Channel %i is not active\n", i);
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@ -424,13 +421,33 @@ static int get_dimm_config(struct mem_ctl_info *mci)
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pvt->channel[i].dimms = 2;
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debugf0("Ch%d phy rd%d, wr%d (0x%08x): "
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"%d ranks, %d %cDIMMs, offset = %d\n",
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"%d ranks, %d %cDIMMs, offset = %d\n\t"
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"present: %i, numbank: %#x, numrank: %#x, "
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"numrow: %#x, numcol: %#x\n",
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i,
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RDLCH(pvt->info.ch_map, i), WRLCH(pvt->info.ch_map, i),
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data,
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pvt->channel[i].ranks, pvt->channel[i].dimms,
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(data & REGISTERED_DIMM)? 'R' : 'U',
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RANKOFFSET(data));
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RANKOFFSET(data),
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DIMM_PRESENT(data),
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NUMBANK(data), NUMRANK(data),
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NUMROW(data), NUMCOL(data));
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pci_read_config_dword(pdev, MC_SAG_CH_0, &value[0]);
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pci_read_config_dword(pdev, MC_SAG_CH_1, &value[1]);
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pci_read_config_dword(pdev, MC_SAG_CH_2, &value[2]);
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pci_read_config_dword(pdev, MC_SAG_CH_3, &value[3]);
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pci_read_config_dword(pdev, MC_SAG_CH_4, &value[4]);
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pci_read_config_dword(pdev, MC_SAG_CH_5, &value[5]);
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pci_read_config_dword(pdev, MC_SAG_CH_6, &value[6]);
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pci_read_config_dword(pdev, MC_SAG_CH_7, &value[7]);
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printk("\t[%i] DIVBY3\tREMOVED\tOFFSET\n", i);
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for (j = 0; j < 8; j++)
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printk("\t\t%#x\t%#x\t%#x\n",
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(value[j] >> 27) & 0x1,
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(value[j] >> 24) & 0x7,
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(value[j] && ((1 << 24) - 1)));
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csr = &mci->csrows[csrow];
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csr->first_page = 0;
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