forked from luck/tmp_suning_uos_patched
ARM: rockchip: fix the SMP code style
Use the below scripts to check: scripts/checkpatch.pl -f --subject arch/arm/mach-rockchip/platsmp.c Signed-off-by: Caesar Wang <wxt@rock-chips.com> Reviewed-by: Douglas Anderson <dianders@chromium.org> Reviewed-by: Kever Yang <kever.yang@rock-chips.com> Signed-off-by: Heiko Stuebner <heiko@sntech.de>
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@ -100,7 +100,7 @@ static int pmu_set_power_domain(int pd, bool on)
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ret = pmu_power_domain_is_on(pd);
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if (ret < 0) {
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pr_err("%s: could not read power domain state\n",
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__func__);
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__func__);
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return ret;
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}
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}
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@ -129,7 +129,7 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
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if (cpu >= ncores) {
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pr_err("%s: cpu %d outside maximum number of cpus %d\n",
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__func__, cpu, ncores);
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__func__, cpu, ncores);
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return -ENXIO;
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}
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@ -139,7 +139,8 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
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return ret;
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if (read_cpuid_part() != ARM_CPU_PART_CORTEX_A9) {
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/* We communicate with the bootrom to active the cpus other
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/*
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* We communicate with the bootrom to active the cpus other
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* than cpu0, after a blob of initialize code, they will
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* stay at wfe state, once they are actived, they will check
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* the mailbox:
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@ -148,11 +149,11 @@ static int rockchip_boot_secondary(unsigned int cpu, struct task_struct *idle)
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* The cpu0 need to wait the other cpus other than cpu0 entering
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* the wfe state.The wait time is affected by many aspects.
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* (e.g: cpu frequency, bootrom frequency, sram frequency, ...)
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* */
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*/
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mdelay(1); /* ensure the cpus other than cpu0 to startup */
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writel(virt_to_phys(rockchip_secondary_startup),
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sram_base_addr + 8);
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sram_base_addr + 8);
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writel(0xDEADBEAF, sram_base_addr + 4);
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dsb_sev();
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}
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@ -335,7 +336,7 @@ static int rockchip_cpu_kill(unsigned int cpu)
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static void rockchip_cpu_die(unsigned int cpu)
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{
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v7_exit_coherency_flush(louis);
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while(1)
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while (1)
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cpu_do_idle();
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}
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#endif
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@ -348,4 +349,5 @@ static struct smp_operations rockchip_smp_ops __initdata = {
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.cpu_die = rockchip_cpu_die,
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#endif
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};
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CPU_METHOD_OF_DECLARE(rk3066_smp, "rockchip,rk3066-smp", &rockchip_smp_ops);
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