forked from luck/tmp_suning_uos_patched
RealView: Move the timer definitions into the EB specific files
This patch moves the timer definitions from platform.h into board-eb.h as they are different on PB11MPCore and PB1176. It also adds timerX_va_base variables in core.c which are set by the realview_eb_timer_init function before invoking realview_timer_init. Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Catalin Marinas
parent
a44ddfd5bf
commit
80192735e4
@ -444,10 +444,10 @@ void realview_leds_event(led_event_t ledevt)
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/*
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* Where is the timer (VA)?
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*/
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#define TIMER0_VA_BASE __io_address(REALVIEW_TIMER0_1_BASE)
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#define TIMER1_VA_BASE (__io_address(REALVIEW_TIMER0_1_BASE) + 0x20)
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#define TIMER2_VA_BASE __io_address(REALVIEW_TIMER2_3_BASE)
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#define TIMER3_VA_BASE (__io_address(REALVIEW_TIMER2_3_BASE) + 0x20)
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void __iomem *timer0_va_base;
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void __iomem *timer1_va_base;
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void __iomem *timer2_va_base;
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void __iomem *timer3_va_base;
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/*
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* How long is the timer interval?
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@ -474,7 +474,7 @@ static void timer_set_mode(enum clock_event_mode mode,
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switch(mode) {
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case CLOCK_EVT_MODE_PERIODIC:
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writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD);
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writel(TIMER_RELOAD, timer0_va_base + TIMER_LOAD);
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ctrl = TIMER_CTRL_PERIODIC;
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ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE | TIMER_CTRL_ENABLE;
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@ -490,16 +490,16 @@ static void timer_set_mode(enum clock_event_mode mode,
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ctrl = 0;
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}
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writel(ctrl, TIMER0_VA_BASE + TIMER_CTRL);
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writel(ctrl, timer0_va_base + TIMER_CTRL);
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}
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static int timer_set_next_event(unsigned long evt,
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struct clock_event_device *unused)
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{
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unsigned long ctrl = readl(TIMER0_VA_BASE + TIMER_CTRL);
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unsigned long ctrl = readl(timer0_va_base + TIMER_CTRL);
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writel(evt, TIMER0_VA_BASE + TIMER_LOAD);
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writel(ctrl | TIMER_CTRL_ENABLE, TIMER0_VA_BASE + TIMER_CTRL);
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writel(evt, timer0_va_base + TIMER_LOAD);
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writel(ctrl | TIMER_CTRL_ENABLE, timer0_va_base + TIMER_CTRL);
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return 0;
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}
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@ -535,7 +535,7 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id)
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struct clock_event_device *evt = &timer0_clockevent;
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/* clear the interrupt */
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writel(1, TIMER0_VA_BASE + TIMER_INTCLR);
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writel(1, timer0_va_base + TIMER_INTCLR);
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evt->event_handler(evt);
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@ -550,7 +550,7 @@ static struct irqaction realview_timer_irq = {
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static cycle_t realview_get_cycles(void)
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{
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return ~readl(TIMER3_VA_BASE + TIMER_VALUE);
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return ~readl(timer3_va_base + TIMER_VALUE);
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}
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static struct clocksource clocksource_realview = {
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@ -565,11 +565,11 @@ static struct clocksource clocksource_realview = {
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static void __init realview_clocksource_init(void)
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{
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/* setup timer 0 as free-running clocksource */
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writel(0, TIMER3_VA_BASE + TIMER_CTRL);
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writel(0xffffffff, TIMER3_VA_BASE + TIMER_LOAD);
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writel(0xffffffff, TIMER3_VA_BASE + TIMER_VALUE);
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writel(0, timer3_va_base + TIMER_CTRL);
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writel(0xffffffff, timer3_va_base + TIMER_LOAD);
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writel(0xffffffff, timer3_va_base + TIMER_VALUE);
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writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
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TIMER3_VA_BASE + TIMER_CTRL);
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timer3_va_base + TIMER_CTRL);
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clocksource_realview.mult =
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clocksource_khz2mult(1000, clocksource_realview.shift);
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@ -606,10 +606,10 @@ void __init realview_timer_init(unsigned int timer_irq)
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/*
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* Initialise to a known state (all timers off)
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*/
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writel(0, TIMER0_VA_BASE + TIMER_CTRL);
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writel(0, TIMER1_VA_BASE + TIMER_CTRL);
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writel(0, TIMER2_VA_BASE + TIMER_CTRL);
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writel(0, TIMER3_VA_BASE + TIMER_CTRL);
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writel(0, timer0_va_base + TIMER_CTRL);
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writel(0, timer1_va_base + TIMER_CTRL);
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writel(0, timer2_va_base + TIMER_CTRL);
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writel(0, timer3_va_base + TIMER_CTRL);
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/*
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* Make irqs happen for the system timer
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@ -55,6 +55,10 @@ extern void __iomem *gic_cpu_base_addr;
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extern void __iomem *twd_base_addr;
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extern unsigned int twd_size;
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#endif
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extern void __iomem *timer0_va_base;
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extern void __iomem *timer1_va_base;
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extern void __iomem *timer2_va_base;
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extern void __iomem *timer3_va_base;
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extern void realview_leds_event(led_event_t ledevt);
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extern void realview_timer_init(unsigned int timer_irq);
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@ -66,13 +66,13 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_TIMER0_1_BASE),
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.pfn = __phys_to_pfn(REALVIEW_TIMER0_1_BASE),
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.virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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}, {
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.virtual = IO_ADDRESS(REALVIEW_TIMER2_3_BASE),
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.pfn = __phys_to_pfn(REALVIEW_TIMER2_3_BASE),
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.virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
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.pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
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.length = SZ_4K,
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.type = MT_DEVICE,
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},
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@ -337,6 +337,11 @@ static void __init realview_eb_timer_init(void)
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{
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unsigned int timer_irq;
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timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
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timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
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timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
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timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
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if (core_tile_eb11mp()) {
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#ifdef CONFIG_LOCAL_TIMERS
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twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);
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@ -26,6 +26,8 @@
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/*
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* RealView EB + ARM11MPCore peripheral addresses
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*/
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#define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
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#define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
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#define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
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#define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */
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@ -190,8 +190,6 @@
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#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
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/* Reserved 0x1000F000 */
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#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
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#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
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#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
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#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
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#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
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#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */
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