RealView: Move the timer definitions into the EB specific files

This patch moves the timer definitions from platform.h into board-eb.h
as they are different on PB11MPCore and PB1176. It also adds
timerX_va_base variables in core.c which are set by the
realview_eb_timer_init function before invoking realview_timer_init.

Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
This commit is contained in:
Catalin Marinas 2008-04-18 22:43:11 +01:00
parent a44ddfd5bf
commit 80192735e4
5 changed files with 34 additions and 25 deletions

View File

@ -444,10 +444,10 @@ void realview_leds_event(led_event_t ledevt)
/* /*
* Where is the timer (VA)? * Where is the timer (VA)?
*/ */
#define TIMER0_VA_BASE __io_address(REALVIEW_TIMER0_1_BASE) void __iomem *timer0_va_base;
#define TIMER1_VA_BASE (__io_address(REALVIEW_TIMER0_1_BASE) + 0x20) void __iomem *timer1_va_base;
#define TIMER2_VA_BASE __io_address(REALVIEW_TIMER2_3_BASE) void __iomem *timer2_va_base;
#define TIMER3_VA_BASE (__io_address(REALVIEW_TIMER2_3_BASE) + 0x20) void __iomem *timer3_va_base;
/* /*
* How long is the timer interval? * How long is the timer interval?
@ -474,7 +474,7 @@ static void timer_set_mode(enum clock_event_mode mode,
switch(mode) { switch(mode) {
case CLOCK_EVT_MODE_PERIODIC: case CLOCK_EVT_MODE_PERIODIC:
writel(TIMER_RELOAD, TIMER0_VA_BASE + TIMER_LOAD); writel(TIMER_RELOAD, timer0_va_base + TIMER_LOAD);
ctrl = TIMER_CTRL_PERIODIC; ctrl = TIMER_CTRL_PERIODIC;
ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE | TIMER_CTRL_ENABLE; ctrl |= TIMER_CTRL_32BIT | TIMER_CTRL_IE | TIMER_CTRL_ENABLE;
@ -490,16 +490,16 @@ static void timer_set_mode(enum clock_event_mode mode,
ctrl = 0; ctrl = 0;
} }
writel(ctrl, TIMER0_VA_BASE + TIMER_CTRL); writel(ctrl, timer0_va_base + TIMER_CTRL);
} }
static int timer_set_next_event(unsigned long evt, static int timer_set_next_event(unsigned long evt,
struct clock_event_device *unused) struct clock_event_device *unused)
{ {
unsigned long ctrl = readl(TIMER0_VA_BASE + TIMER_CTRL); unsigned long ctrl = readl(timer0_va_base + TIMER_CTRL);
writel(evt, TIMER0_VA_BASE + TIMER_LOAD); writel(evt, timer0_va_base + TIMER_LOAD);
writel(ctrl | TIMER_CTRL_ENABLE, TIMER0_VA_BASE + TIMER_CTRL); writel(ctrl | TIMER_CTRL_ENABLE, timer0_va_base + TIMER_CTRL);
return 0; return 0;
} }
@ -535,7 +535,7 @@ static irqreturn_t realview_timer_interrupt(int irq, void *dev_id)
struct clock_event_device *evt = &timer0_clockevent; struct clock_event_device *evt = &timer0_clockevent;
/* clear the interrupt */ /* clear the interrupt */
writel(1, TIMER0_VA_BASE + TIMER_INTCLR); writel(1, timer0_va_base + TIMER_INTCLR);
evt->event_handler(evt); evt->event_handler(evt);
@ -550,7 +550,7 @@ static struct irqaction realview_timer_irq = {
static cycle_t realview_get_cycles(void) static cycle_t realview_get_cycles(void)
{ {
return ~readl(TIMER3_VA_BASE + TIMER_VALUE); return ~readl(timer3_va_base + TIMER_VALUE);
} }
static struct clocksource clocksource_realview = { static struct clocksource clocksource_realview = {
@ -565,11 +565,11 @@ static struct clocksource clocksource_realview = {
static void __init realview_clocksource_init(void) static void __init realview_clocksource_init(void)
{ {
/* setup timer 0 as free-running clocksource */ /* setup timer 0 as free-running clocksource */
writel(0, TIMER3_VA_BASE + TIMER_CTRL); writel(0, timer3_va_base + TIMER_CTRL);
writel(0xffffffff, TIMER3_VA_BASE + TIMER_LOAD); writel(0xffffffff, timer3_va_base + TIMER_LOAD);
writel(0xffffffff, TIMER3_VA_BASE + TIMER_VALUE); writel(0xffffffff, timer3_va_base + TIMER_VALUE);
writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC, writel(TIMER_CTRL_32BIT | TIMER_CTRL_ENABLE | TIMER_CTRL_PERIODIC,
TIMER3_VA_BASE + TIMER_CTRL); timer3_va_base + TIMER_CTRL);
clocksource_realview.mult = clocksource_realview.mult =
clocksource_khz2mult(1000, clocksource_realview.shift); clocksource_khz2mult(1000, clocksource_realview.shift);
@ -606,10 +606,10 @@ void __init realview_timer_init(unsigned int timer_irq)
/* /*
* Initialise to a known state (all timers off) * Initialise to a known state (all timers off)
*/ */
writel(0, TIMER0_VA_BASE + TIMER_CTRL); writel(0, timer0_va_base + TIMER_CTRL);
writel(0, TIMER1_VA_BASE + TIMER_CTRL); writel(0, timer1_va_base + TIMER_CTRL);
writel(0, TIMER2_VA_BASE + TIMER_CTRL); writel(0, timer2_va_base + TIMER_CTRL);
writel(0, TIMER3_VA_BASE + TIMER_CTRL); writel(0, timer3_va_base + TIMER_CTRL);
/* /*
* Make irqs happen for the system timer * Make irqs happen for the system timer

View File

@ -55,6 +55,10 @@ extern void __iomem *gic_cpu_base_addr;
extern void __iomem *twd_base_addr; extern void __iomem *twd_base_addr;
extern unsigned int twd_size; extern unsigned int twd_size;
#endif #endif
extern void __iomem *timer0_va_base;
extern void __iomem *timer1_va_base;
extern void __iomem *timer2_va_base;
extern void __iomem *timer3_va_base;
extern void realview_leds_event(led_event_t ledevt); extern void realview_leds_event(led_event_t ledevt);
extern void realview_timer_init(unsigned int timer_irq); extern void realview_timer_init(unsigned int timer_irq);

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@ -66,13 +66,13 @@ static struct map_desc realview_eb_io_desc[] __initdata = {
.length = SZ_4K, .length = SZ_4K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(REALVIEW_TIMER0_1_BASE), .virtual = IO_ADDRESS(REALVIEW_EB_TIMER0_1_BASE),
.pfn = __phys_to_pfn(REALVIEW_TIMER0_1_BASE), .pfn = __phys_to_pfn(REALVIEW_EB_TIMER0_1_BASE),
.length = SZ_4K, .length = SZ_4K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, { }, {
.virtual = IO_ADDRESS(REALVIEW_TIMER2_3_BASE), .virtual = IO_ADDRESS(REALVIEW_EB_TIMER2_3_BASE),
.pfn = __phys_to_pfn(REALVIEW_TIMER2_3_BASE), .pfn = __phys_to_pfn(REALVIEW_EB_TIMER2_3_BASE),
.length = SZ_4K, .length = SZ_4K,
.type = MT_DEVICE, .type = MT_DEVICE,
}, },
@ -337,6 +337,11 @@ static void __init realview_eb_timer_init(void)
{ {
unsigned int timer_irq; unsigned int timer_irq;
timer0_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE);
timer1_va_base = __io_address(REALVIEW_EB_TIMER0_1_BASE) + 0x20;
timer2_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE);
timer3_va_base = __io_address(REALVIEW_EB_TIMER2_3_BASE) + 0x20;
if (core_tile_eb11mp()) { if (core_tile_eb11mp()) {
#ifdef CONFIG_LOCAL_TIMERS #ifdef CONFIG_LOCAL_TIMERS
twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE); twd_base_addr = __io_address(REALVIEW_EB11MP_TWD_BASE);

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@ -26,6 +26,8 @@
/* /*
* RealView EB + ARM11MPCore peripheral addresses * RealView EB + ARM11MPCore peripheral addresses
*/ */
#define REALVIEW_EB_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
#define REALVIEW_EB_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
#define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */ #define REALVIEW_EB_GIC_CPU_BASE 0x10040000 /* Generic interrupt controller CPU interface */
#define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */ #define REALVIEW_EB_GIC_DIST_BASE 0x10041000 /* Generic interrupt controller distributor */

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@ -190,8 +190,6 @@
#define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */ #define REALVIEW_SCI_BASE 0x1000E000 /* Smart card controller */
/* Reserved 0x1000F000 */ /* Reserved 0x1000F000 */
#define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */ #define REALVIEW_WATCHDOG_BASE 0x10010000 /* watchdog interface */
#define REALVIEW_TIMER0_1_BASE 0x10011000 /* Timer 0 and 1 */
#define REALVIEW_TIMER2_3_BASE 0x10012000 /* Timer 2 and 3 */
#define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */ #define REALVIEW_GPIO0_BASE 0x10013000 /* GPIO port 0 */
#define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */ #define REALVIEW_GPIO1_BASE 0x10014000 /* GPIO port 1 */
#define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */ #define REALVIEW_GPIO2_BASE 0x10015000 /* GPIO port 2 */