AcoSail/kernel_optimize_test
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[MIPS] MT: Initialise all writable bits in Cause register to zero.

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Recent 34Ks come out of reset with WP enabled on VPE 1 so we take an
immediate exception when starting the second VPE.

Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Chris Dearman 2006-08-07 15:08:01 +01:00 committed by Ralf Baechle
parent bca70d24c0
commit 847b9dfcca
1 changed files with 1 additions and 1 deletions
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arch/mips/kernel/smp-mt.c
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@ -203,7 +203,7 @@ void plat_smp_setup(void)
write_vpe_c0_config( read_c0_config());
/* make sure there are no software interrupts pending */
write_vpe_c0_cause(read_vpe_c0_cause() & ~(C_SW1|C_SW0));
write_vpe_c0_cause(0);
/* Propagate Config7 */
write_vpe_c0_config7(read_c0_config7());