forked from luck/tmp_suning_uos_patched
iwl3945: move structures from iwl-3945.h to iwl-dev.h
The patch moves few structres from iwl-3945.h to iwl-dev.h. Signed-off-by: Abhijeet Kolekar <abhijeet.kolekar@intel.com> Signed-off-by: Zhu Yi <yi.zhu@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -121,34 +121,6 @@ struct iwl3945_tx_info {
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struct sk_buff *skb[MAX_NUM_OF_TBS];
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};
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/**
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* struct iwl3945_tx_queue - Tx Queue for DMA
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* @q: generic Rx/Tx queue descriptor
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* @bd: base of circular buffer of TFDs
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* @cmd: array of command/Tx buffers
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* @dma_addr_cmd: physical address of cmd/tx buffer array
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* @txb: array of per-TFD driver data
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* @need_update: indicates need to update read/write index
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*
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* A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
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* descriptors) and required locking structures.
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*/
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struct iwl3945_tx_queue {
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struct iwl_queue q;
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struct iwl3945_tfd_frame *bd;
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struct iwl3945_cmd *cmd;
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dma_addr_t dma_addr_cmd;
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struct iwl3945_tx_info *txb;
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int need_update;
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int active;
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};
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struct iwl3945_clip_group {
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/* maximum power level to prevent clipping for each rate, derived by
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* us from this band's saturation power in EEPROM */
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const s8 clip_powers[IWL_MAX_RATES];
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};
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#include "iwl-agn-rs.h"
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#define IWL_TX_FIFO_AC0 0
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@ -303,16 +275,6 @@ struct iwl3945_rx_queue {
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#define IWL_INVALID_RATE 0xFF
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#define IWL_INVALID_VALUE -1
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struct iwl3945_tid_data {
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u16 seq_number;
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};
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struct iwl3945_hw_key {
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enum ieee80211_key_alg alg;
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int keylen;
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u8 key[32];
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};
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union iwl3945_ht_rate_supp {
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u16 rates;
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struct {
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@ -351,14 +313,6 @@ struct iwl3945_qos_info {
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#define STA_PS_STATUS_WAKE 0
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#define STA_PS_STATUS_SLEEP 1
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struct iwl3945_station_entry {
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struct iwl3945_addsta_cmd sta;
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struct iwl3945_tid_data tid[MAX_TID_COUNT];
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u8 used;
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u8 ps_status;
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struct iwl3945_hw_key keyinfo;
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};
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/* uCode file layout */
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struct iwl3945_ucode {
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__le32 ver; /* major/minor/API/serial */
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@ -156,6 +156,12 @@ struct iwl4965_channel_tgh_info {
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#define IWL4965_MAX_RATE (33)
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struct iwl3945_clip_group {
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/* maximum power level to prevent clipping for each rate, derived by
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* us from this band's saturation power in EEPROM */
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const s8 clip_powers[IWL_MAX_RATES];
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};
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/* current Tx power values to use, one for each rate for each channel.
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* requested power is limited by:
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* -- regulatory EEPROM limits for this channel
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@ -218,6 +224,27 @@ struct iwl_channel_info {
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struct iwl3945_scan_power_info scan_pwr_info[IWL_NUM_SCAN_RATES];
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};
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/**
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* struct iwl3945_tx_queue - Tx Queue for DMA
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* @q: generic Rx/Tx queue descriptor
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* @bd: base of circular buffer of TFDs
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* @cmd: array of command/Tx buffers
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* @dma_addr_cmd: physical address of cmd/tx buffer array
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* @txb: array of per-TFD driver data
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* @need_update: indicates need to update read/write index
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*
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* A Tx queue consists of circular buffer of BDs (a.k.a. TFDs, transmit frame
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* descriptors) and required locking structures.
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*/
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struct iwl3945_tx_queue {
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struct iwl_queue q;
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struct iwl3945_tfd_frame *bd;
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struct iwl3945_cmd *cmd;
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dma_addr_t dma_addr_cmd;
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struct iwl3945_tx_info *txb;
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int need_update;
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int active;
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};
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#define IWL_TX_FIFO_AC0 0
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#define IWL_TX_FIFO_AC1 1
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@ -462,6 +489,24 @@ struct iwl_qos_info {
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#define STA_PS_STATUS_WAKE 0
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#define STA_PS_STATUS_SLEEP 1
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struct iwl3945_tid_data {
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u16 seq_number;
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};
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struct iwl3945_hw_key {
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enum ieee80211_key_alg alg;
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int keylen;
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u8 key[32];
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};
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struct iwl3945_station_entry {
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struct iwl3945_addsta_cmd sta;
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struct iwl3945_tid_data tid[MAX_TID_COUNT];
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u8 used;
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u8 ps_status;
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struct iwl3945_hw_key keyinfo;
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};
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struct iwl_station_entry {
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struct iwl_addsta_cmd sta;
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struct iwl_tid_data tid[MAX_TID_COUNT];
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@ -800,6 +845,10 @@ struct iwl_priv {
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struct iwl_channel_info *channel_info; /* channel info array */
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u8 channel_count; /* # of channels */
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/* each calibration channel group in the EEPROM has a derived
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* clip setting for each rate. 3945 only.*/
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const struct iwl3945_clip_group clip39_groups[5];
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/* thermal calibration */
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s32 temperature; /* degrees Kelvin */
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s32 last_temperature;
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