forked from luck/tmp_suning_uos_patched
ARM: at91: cleanup initilisation code by removing dead code
The AT91-specific SoC strucutre "struct at91_init_soc" was filled with specific !DT initilisation functions. Now that we got rid of the !DT board file description, remove unneeded functions. Signed-off-by: Arnd Bergmann <arnd@arndb.de> [nicolas.ferre@atmel.com: split patch] Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
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@ -22,19 +22,13 @@ extern void __init at91_init_sram(int bank, unsigned long base,
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/* Processors */
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extern void __init at91rm9200_set_type(int type);
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extern void __init at91_initialize(unsigned long main_clock);
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extern void __init at91rm9200_dt_initialize(void);
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extern void __init at91_dt_initialize(void);
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/* Interrupts */
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extern void __init at91_init_irq_default(void);
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extern void __init at91_init_interrupts(unsigned int priority[]);
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extern void __init at91_sysirq_mask_rtc(u32 rtc_base);
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extern void __init at91_sysirq_mask_rtt(u32 rtt_base);
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/* Devices */
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extern void __init at91_register_devices(void);
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/* Timer */
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extern void __init at91_init_time(void);
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extern void at91rm9200_ioremap_st(u32 addr);
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@ -42,19 +36,12 @@ extern void at91rm9200_timer_init(void);
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extern void at91sam926x_ioremap_pit(u32 addr);
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extern void at91sam926x_pit_init(int irq);
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/* Power Management */
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extern void at91_irq_suspend(void);
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extern void at91_irq_resume(void);
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/* idle */
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extern void at91sam9_idle(void);
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/* Matrix */
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extern void at91_ioremap_matrix(u32 base_addr);
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/* Ram Controler */
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extern void at91_ioremap_ramc(int id, u32 addr, u32 size);
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/* GPIO */
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#define AT91RM9200_PQFP 3 /* AT91RM9200 PQFP package has 3 banks */
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#define AT91RM9200_BGA 4 /* AT91RM9200 BGA package has 4 banks */
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@ -42,31 +42,9 @@ void __init at91rm9200_set_type(int type)
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at91_get_soc_subtype(&at91_soc_initdata));
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}
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void __init at91_init_irq_default(void)
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{
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at91_init_interrupts(at91_boot_soc.default_irq_priority);
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}
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void __init at91_init_interrupts(unsigned int *priority)
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{
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/* Enable GPIO interrupts */
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at91_gpio_irq_setup();
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}
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void __iomem *at91_ramc_base[2];
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EXPORT_SYMBOL_GPL(at91_ramc_base);
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void __init at91_ioremap_ramc(int id, u32 addr, u32 size)
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{
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if (id < 0 || id > 1) {
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pr_emerg("Wrong RAM controller id (%d), cannot continue\n", id);
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BUG();
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}
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at91_ramc_base[id] = ioremap(addr, size);
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if (!at91_ramc_base[id])
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panic(pr_fmt("Impossible to ioremap ramc.%d 0x%x\n"), id, addr);
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}
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static struct map_desc sram_desc[2] __initdata;
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void __init at91_init_sram(int bank, unsigned long base, unsigned int length)
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@ -414,7 +392,6 @@ void __init at91_ioremap_matrix(u32 base_addr)
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panic(pr_fmt("Impossible to ioremap at91_matrix_base\n"));
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}
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#if defined(CONFIG_OF)
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static struct of_device_id ramc_ids[] = {
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{ .compatible = "atmel,at91rm9200-sdramc", .data = at91rm9200_standby },
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{ .compatible = "atmel,at91sam9260-sdramc", .data = at91sam9_sdram_standby },
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@ -456,10 +433,6 @@ void __init at91rm9200_dt_initialize(void)
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{
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at91_dt_ramc();
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/* Register the processor-specific clocks */
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if (at91_boot_soc.register_clocks)
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at91_boot_soc.register_clocks();
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at91_boot_soc.init();
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}
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@ -467,33 +440,6 @@ void __init at91_dt_initialize(void)
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{
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at91_dt_ramc();
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/* Register the processor-specific clocks */
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if (at91_boot_soc.register_clocks)
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at91_boot_soc.register_clocks();
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if (at91_boot_soc.init)
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at91_boot_soc.init();
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}
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#endif
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void __init at91_initialize(unsigned long main_clock)
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{
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at91_boot_soc.ioremap_registers();
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/* Register the processor-specific clocks */
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at91_boot_soc.register_clocks();
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at91_boot_soc.init();
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pinctrl_provide_dummies();
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}
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void __init at91_register_devices(void)
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{
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at91_boot_soc.register_devices();
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}
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void __init at91_init_time(void)
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{
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at91_boot_soc.init_time();
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}
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@ -6,14 +6,8 @@
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struct at91_init_soc {
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int builtin;
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u32 extern_irq;
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unsigned int *default_irq_priority;
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void (*map_io)(void);
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void (*ioremap_registers)(void);
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void (*register_clocks)(void);
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void (*register_devices)(void);
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void (*init)(void);
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void (*init_time)(void);
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};
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extern struct at91_init_soc at91_boot_soc;
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