forked from luck/tmp_suning_uos_patched
MIPS: CPC: Add start, stop and running CM3 CPC registers
Add the new CM3 registers for controlling bringing up and powering down VPs on MIPSR6 cores. Signed-off-by: Markos Chandras <markos.chandras@imgtec.com> Signed-off-by: Paul Burton <paul.burton@imgtec.com> Cc: Bjorn Helgaas <bhelgaas@google.com> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/12330/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
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@ -106,6 +106,9 @@ BUILD_CPC_R_(revision, MIPS_CPC_GCB_OFS + 0x20)
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BUILD_CPC_Cx_RW(cmd, 0x00)
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BUILD_CPC_Cx_RW(stat_conf, 0x08)
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BUILD_CPC_Cx_RW(other, 0x10)
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BUILD_CPC_Cx_RW(vp_stop, 0x20)
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BUILD_CPC_Cx_RW(vp_run, 0x28)
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BUILD_CPC_Cx_RW(vp_running, 0x30)
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/* CPC_Cx_CMD register fields */
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#define CPC_Cx_CMD_SHF 0
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