net: phy: realtek: add delay to fix RXC generation issue

[ Upstream commit 6813cc8cfdaf401476e1a007cec8ae338cefa573 ]

PHY will delay about 11.5ms to generate RXC clock when switching from
power down to normal operation. Read/write registers would also cause RXC
become unstable and stop for a while during this process. Realtek engineer
suggests 15ms or more delay can workaround this issue.

Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
This commit is contained in:
Joakim Zhang 2021-06-08 11:15:35 +08:00 committed by Greg Kroah-Hartman
parent c71de31b2e
commit 8a4318c14a

View File

@ -246,6 +246,19 @@ static int rtl8211f_config_init(struct phy_device *phydev)
return 0;
}
static int rtl821x_resume(struct phy_device *phydev)
{
int ret;
ret = genphy_resume(phydev);
if (ret < 0)
return ret;
msleep(20);
return 0;
}
static int rtl8211e_config_init(struct phy_device *phydev)
{
int ret = 0, oldpage;
@ -624,7 +637,7 @@ static struct phy_driver realtek_drvs[] = {
.ack_interrupt = &rtl8211f_ack_interrupt,
.config_intr = &rtl8211f_config_intr,
.suspend = genphy_suspend,
.resume = genphy_resume,
.resume = rtl821x_resume,
.read_page = rtl821x_read_page,
.write_page = rtl821x_write_page,
}, {