forked from luck/tmp_suning_uos_patched
net: phy: realtek: add delay to fix RXC generation issue
[ Upstream commit 6813cc8cfdaf401476e1a007cec8ae338cefa573 ] PHY will delay about 11.5ms to generate RXC clock when switching from power down to normal operation. Read/write registers would also cause RXC become unstable and stop for a while during this process. Realtek engineer suggests 15ms or more delay can workaround this issue. Signed-off-by: Joakim Zhang <qiangqing.zhang@nxp.com> Signed-off-by: David S. Miller <davem@davemloft.net> Signed-off-by: Sasha Levin <sashal@kernel.org>
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@ -246,6 +246,19 @@ static int rtl8211f_config_init(struct phy_device *phydev)
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return 0;
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}
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static int rtl821x_resume(struct phy_device *phydev)
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{
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int ret;
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ret = genphy_resume(phydev);
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if (ret < 0)
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return ret;
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msleep(20);
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return 0;
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}
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static int rtl8211e_config_init(struct phy_device *phydev)
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{
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int ret = 0, oldpage;
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@ -624,7 +637,7 @@ static struct phy_driver realtek_drvs[] = {
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.ack_interrupt = &rtl8211f_ack_interrupt,
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.config_intr = &rtl8211f_config_intr,
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.suspend = genphy_suspend,
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.resume = genphy_resume,
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.resume = rtl821x_resume,
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.read_page = rtl821x_read_page,
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.write_page = rtl821x_write_page,
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}, {
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