forked from luck/tmp_suning_uos_patched
[S2IO]: Making MSIX as default intr_type
- Making MSIX as default intr_type - Driver will test MSI-X by issuing test MSI-X vector and if fails it will fallback to INTA Signed-off-by: Sivakumar Subramani <sivakumar.subramani@neterion.com> Signed-off-by: Ramkrishna Vepa <ram.vepa@neterion.com> Signed-off-by: Jeff Garzik <jeff@garzik.org> Signed-off-by: David S. Miller <davem@davemloft.net>
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28006c65a7
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8abc4d5b84
@ -220,7 +220,7 @@ struct XENA_dev_config {
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u64 scheduled_int_ctrl;
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#define SCHED_INT_CTRL_TIMER_EN BIT(0)
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#define SCHED_INT_CTRL_ONE_SHOT BIT(1)
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#define SCHED_INT_CTRL_INT2MSI TBD
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#define SCHED_INT_CTRL_INT2MSI(val) vBIT(val,10,6)
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#define SCHED_INT_PERIOD TBD
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u64 txreqtimeout;
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@ -37,7 +37,7 @@
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* tx_fifo_len: This too is an array of 8. Each element defines the number of
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* Tx descriptors that can be associated with each corresponding FIFO.
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* intr_type: This defines the type of interrupt. The values can be 0(INTA),
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* 2(MSI_X). Default value is '0(INTA)'
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* 2(MSI_X). Default value is '2(MSI_X)'
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* lro: Specifies whether to enable Large Receive Offload (LRO) or not.
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* Possible values '1' for enable '0' for disable. Default is '0'
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* lro_max_pkts: This parameter defines maximum number of packets can be
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@ -428,7 +428,7 @@ S2IO_PARM_INT(l3l4hdr_size, 128);
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/* Frequency of Rx desc syncs expressed as power of 2 */
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S2IO_PARM_INT(rxsync_frequency, 3);
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/* Interrupt type. Values can be 0(INTA), 2(MSI_X) */
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S2IO_PARM_INT(intr_type, 0);
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S2IO_PARM_INT(intr_type, 2);
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/* Large receive offload feature */
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S2IO_PARM_INT(lro, 0);
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/* Max pkts to be aggregated by LRO at one time. If not specified,
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@ -3773,6 +3773,59 @@ static int s2io_enable_msi_x(struct s2io_nic *nic)
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return 0;
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}
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/* Handle software interrupt used during MSI(X) test */
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static irqreturn_t __devinit s2io_test_intr(int irq, void *dev_id)
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{
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struct s2io_nic *sp = dev_id;
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sp->msi_detected = 1;
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wake_up(&sp->msi_wait);
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return IRQ_HANDLED;
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}
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/* Test interrupt path by forcing a a software IRQ */
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static int __devinit s2io_test_msi(struct s2io_nic *sp)
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{
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struct pci_dev *pdev = sp->pdev;
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struct XENA_dev_config __iomem *bar0 = sp->bar0;
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int err;
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u64 val64, saved64;
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err = request_irq(sp->entries[1].vector, s2io_test_intr, 0,
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sp->name, sp);
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if (err) {
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DBG_PRINT(ERR_DBG, "%s: PCI %s: cannot assign irq %d\n",
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sp->dev->name, pci_name(pdev), pdev->irq);
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return err;
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}
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init_waitqueue_head (&sp->msi_wait);
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sp->msi_detected = 0;
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saved64 = val64 = readq(&bar0->scheduled_int_ctrl);
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val64 |= SCHED_INT_CTRL_ONE_SHOT;
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val64 |= SCHED_INT_CTRL_TIMER_EN;
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val64 |= SCHED_INT_CTRL_INT2MSI(1);
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writeq(val64, &bar0->scheduled_int_ctrl);
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wait_event_timeout(sp->msi_wait, sp->msi_detected, HZ/10);
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if (!sp->msi_detected) {
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/* MSI(X) test failed, go back to INTx mode */
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DBG_PRINT(ERR_DBG, "%s: PCI %s: No interrupt was generated"
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"using MSI(X) during test\n", sp->dev->name,
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pci_name(pdev));
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err = -EOPNOTSUPP;
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}
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free_irq(sp->entries[1].vector, sp);
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writeq(saved64, &bar0->scheduled_int_ctrl);
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return err;
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}
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/* ********************************************************* *
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* Functions defined below concern the OS part of the driver *
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* ********************************************************* */
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@ -3803,6 +3856,42 @@ static int s2io_open(struct net_device *dev)
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napi_enable(&sp->napi);
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if (sp->intr_type == MSI_X) {
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int ret = s2io_enable_msi_x(sp);
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if (!ret) {
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u16 msi_control;
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ret = s2io_test_msi(sp);
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/* rollback MSI-X, will re-enable during add_isr() */
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kfree(sp->entries);
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sp->mac_control.stats_info->sw_stat.mem_freed +=
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(MAX_REQUESTED_MSI_X *
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sizeof(struct msix_entry));
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kfree(sp->s2io_entries);
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sp->mac_control.stats_info->sw_stat.mem_freed +=
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(MAX_REQUESTED_MSI_X *
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sizeof(struct s2io_msix_entry));
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sp->entries = NULL;
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sp->s2io_entries = NULL;
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pci_read_config_word(sp->pdev, 0x42, &msi_control);
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msi_control &= 0xFFFE; /* Disable MSI */
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pci_write_config_word(sp->pdev, 0x42, msi_control);
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pci_disable_msix(sp->pdev);
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}
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if (ret) {
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DBG_PRINT(ERR_DBG,
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"%s: MSI-X requested but failed to enable\n",
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dev->name);
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sp->intr_type = INTA;
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}
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}
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/* Initialize H/W and enable interrupts */
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err = s2io_card_up(sp);
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if (err) {
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@ -412,6 +412,10 @@ struct config_param {
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struct tx_fifo_config tx_cfg[MAX_TX_FIFOS]; /*Per-Tx FIFO config */
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u32 max_txds; /*Max no. of Tx buffer descriptor per TxDL */
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u64 tx_intr_type;
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#define INTA 0
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#define MSI_X 2
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u8 intr_type;
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/* Specifies if Tx Intr is UTILZ or PER_LIST type. */
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/* Rx Side */
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@ -862,6 +866,8 @@ struct s2io_nic {
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struct vlan_group *vlgrp;
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#define MSIX_FLG 0xA5
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struct msix_entry *entries;
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int msi_detected;
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wait_queue_head_t msi_wait;
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struct s2io_msix_entry *s2io_entries;
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char desc[MAX_REQUESTED_MSI_X][25];
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