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MIPS: OCTEON: octeon-usb: use common gpio_bit definition

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cvmx_gpio_bit_cfgx bitfields are indentical on cn70xx and cn73xx,
and also match the default definition. So use that instead.

Signed-off-by: Aaro Koskinen <aaro.koskinen@iki.fi>
Signed-off-by: Paul Burton <paul.burton@mips.com>
Cc: Ralf Baechle <ralf@linux-mips.org>
Cc: James Hogan <jhogan@kernel.org>
Cc: linux-mips@vger.kernel.org
This commit is contained in:
Aaro Koskinen 2018-12-04 22:12:16 +02:00 committed by Paul Burton
parent 99cffb4e43
commit 8b5c4eb171
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GPG Key ID: 3EA79FACB57500DD
1 changed files with 3 additions and 3 deletions
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6
arch/mips/cavium-octeon/octeon-usb.c
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@ -253,17 +253,17 @@ static int dwc3_octeon_config_power(struct device *dev, u64 base)
&& gpio <= 31) {
gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(gpio));
gpio_bit.s.tx_oe = 1;
gpio_bit.cn73xx.output_sel = (index == 0 ? 0x14 : 0x15);
gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x15);
cvmx_write_csr(CVMX_GPIO_BIT_CFGX(gpio), gpio_bit.u64);
} else if (gpio <= 15) {
gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_BIT_CFGX(gpio));
gpio_bit.s.tx_oe = 1;
gpio_bit.cn70xx.output_sel = (index == 0 ? 0x14 : 0x19);
gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x19);
cvmx_write_csr(CVMX_GPIO_BIT_CFGX(gpio), gpio_bit.u64);
} else {
gpio_bit.u64 = cvmx_read_csr(CVMX_GPIO_XBIT_CFGX(gpio));
gpio_bit.s.tx_oe = 1;
gpio_bit.cn70xx.output_sel = (index == 0 ? 0x14 : 0x19);
gpio_bit.s.output_sel = (index == 0 ? 0x14 : 0x19);
cvmx_write_csr(CVMX_GPIO_XBIT_CFGX(gpio), gpio_bit.u64);
}