forked from luck/tmp_suning_uos_patched
blackfin: bf60x: bfin_uart: Add more LCR bits masks
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com> Signed-off-by: Bob Liu <lliubbo@gmail.com>
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@ -68,6 +68,7 @@ struct bfin_serial_port {
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#define UMOD_MASK 0x30 /* Uart Mode Mask */
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#define WLS(x) (((x-5) & 0x03) << 8) /* Word Length Select */
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#define WLS_MASK 0x300 /* Word length Select Mask */
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#define WLS_OFFSET 8 /* Word length Select Offset */
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#define STB 0x1000 /* Stop Bits */
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#define STBH 0x2000 /* Half Stop Bits */
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#define PEN 0x4000 /* Parity Enable */
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@ -76,7 +77,7 @@ struct bfin_serial_port {
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#define FPE 0x20000 /* Force Parity Error On Transmit */
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#define FFE 0x40000 /* Force Framing Error On Transmit */
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#define SB 0x80000 /* Set Break */
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#define LCR_MASK (STP | EPS | PEN | STB | WLS_MASK)
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#define LCR_MASK (SB | STP | EPS | PEN | STB | WLS_MASK)
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#define FCPOL 0x400000 /* Flow Control Pin Polarity */
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#define RPOLC 0x800000 /* IrDA RX Polarity Change */
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#define TPOLC 0x1000000 /* IrDA TX Polarity Change */
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@ -112,13 +113,14 @@ struct bfin_serial_port {
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/* UART_LCR Masks */
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#define WLS(x) (((x)-5) & 0x03) /* Word Length Select */
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#define WLS_MASK 0x03 /* Word length Select Mask */
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#define WLS_OFFSET 0 /* Word length Select Offset */
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#define STB 0x04 /* Stop Bits */
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#define PEN 0x08 /* Parity Enable */
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#define EPS 0x10 /* Even Parity Select */
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#define STP 0x20 /* Stick Parity */
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#define SB 0x40 /* Set Break */
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#define DLAB 0x80 /* Divisor Latch Access */
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#define LCR_MASK (STP | EPS | PEN | STB | WLS_MASK)
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#define LCR_MASK (SB | STP | EPS | PEN | STB | WLS_MASK)
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/* UART_LSR Masks */
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#define DR 0x01 /* Data Ready */
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