AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

ide-timings: use ->pio_mode value to determine fastest PIO speed

Browse Source 
Use the current PIO mode value instead of the physical maximum one
to determine the fastest allowed PIO for shared PIO/DMA timings.

Affected host drivers: amd74xx and via82cxxx.

[ Update comment to match -DaveM ]

Signed-off-by: Bartlomiej Zolnierkiewicz <bzolnier@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
Bartlomiej Zolnierkiewicz 2010-01-19 01:47:29 -08:00 committed by David S. Miller
parent 8776168ca2
commit 8e714a074b
1 changed files with 2 additions and 3 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

5
drivers/ide/ide-timings.c
View File

@ -186,11 +186,10 @@ int ide_timing_compute(ide_drive_t *drive, u8 speed,
/* /*
* Even in DMA/UDMA modes we still use PIO access for IDENTIFY, * Even in DMA/UDMA modes we still use PIO access for IDENTIFY,
* S.M.A.R.T and some other commands. We have to ensure that the * S.M.A.R.T and some other commands. We have to ensure that the
* DMA cycle timing is slower/equal than the fastest PIO timing. * DMA cycle timing is slower/equal than the current PIO timing.
*/ */
if (speed >= XFER_SW_DMA_0) { if (speed >= XFER_SW_DMA_0) {
u8 pio = ide_get_best_pio_mode(drive, 255, 5); ide_timing_compute(drive, drive->pio_mode, &p, T, UT);
ide_timing_compute(drive, XFER_PIO_0 + pio, &p, T, UT);
ide_timing_merge(&p, t, t, IDE_TIMING_ALL); ide_timing_merge(&p, t, t, IDE_TIMING_ALL);
} }