forked from luck/tmp_suning_uos_patched
clk: st: Add polarity bit indication
This patch introduces polarity indication for pll power up bit and for standby bit in order to have same code between stih416 and stih407 boards. Signed-off-by: Gabriel Fernandez <gabriel.fernandez@linaro.org> Acked-by: Peter Griffin <peter.griffin@linaro.org> Signed-off-by: Mike Turquette <mturquette@linaro.org>
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@ -67,6 +67,8 @@ struct clkgen_quadfs_data {
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bool reset_present;
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bool bwfilter_present;
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bool lockstatus_present;
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bool powerup_polarity;
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bool standby_polarity;
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bool nsdiv_present;
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struct clkgen_field ndiv;
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struct clkgen_field ref_bw;
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@ -308,7 +310,7 @@ static int quadfs_pll_enable(struct clk_hw *hw)
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/*
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* Power up the PLL
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*/
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CLKGEN_WRITE(pll, npda, 1);
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CLKGEN_WRITE(pll, npda, !pll->data->powerup_polarity);
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if (pll->lock)
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spin_unlock_irqrestore(pll->lock, flags);
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@ -335,7 +337,7 @@ static void quadfs_pll_disable(struct clk_hw *hw)
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* Powerdown the PLL and then put block into soft reset if we have
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* reset control.
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*/
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CLKGEN_WRITE(pll, npda, 0);
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CLKGEN_WRITE(pll, npda, pll->data->powerup_polarity);
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if (pll->data->reset_present)
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CLKGEN_WRITE(pll, nreset, 0);
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@ -611,7 +613,7 @@ static int quadfs_fsynth_enable(struct clk_hw *hw)
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if (fs->lock)
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spin_lock_irqsave(fs->lock, flags);
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CLKGEN_WRITE(fs, nsb[fs->chan], 1);
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CLKGEN_WRITE(fs, nsb[fs->chan], !fs->data->standby_polarity);
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if (fs->lock)
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spin_unlock_irqrestore(fs->lock, flags);
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@ -631,7 +633,7 @@ static void quadfs_fsynth_disable(struct clk_hw *hw)
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if (fs->lock)
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spin_lock_irqsave(fs->lock, flags);
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CLKGEN_WRITE(fs, nsb[fs->chan], 0);
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CLKGEN_WRITE(fs, nsb[fs->chan], !fs->data->standby_polarity);
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if (fs->lock)
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spin_unlock_irqrestore(fs->lock, flags);
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@ -645,7 +647,7 @@ static int quadfs_fsynth_is_enabled(struct clk_hw *hw)
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pr_debug("%s: %s enable bit = 0x%x\n",
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__func__, __clk_get_name(hw->clk), nsb);
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return !!nsb;
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return fs->data->standby_polarity ? !nsb : !!nsb;
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}
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#define P15 (uint64_t)(1 << 15)
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