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MIPS: Read CPU IRQ line that FDC to routed to

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Read the CPU IRQ line reportedly used for the Fast Debug Channel (FDC)
interrupt from the IntCtl register and store it in cp0_fdc_irq where
platform implementations of the new weak platform function
get_c0_fdc_int() can refer to it.

[ralf@linux-mips.org: Fixed conflict.]

Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Cc: James Hogan <james.hogan@imgtec.com>
Patchwork: https://patchwork.linux-mips.org/patch/9140/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
James Hogan 2015-01-29 11:14:07 +00:00 committed by Ralf Baechle
parent 9323f84f22
commit 8f7ff02796
2 changed files with 15 additions and 0 deletions
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3
arch/mips/include/asm/irq.h
View File

@ -47,6 +47,9 @@ extern void free_irqno(unsigned int irq);
extern int cp0_compare_irq;
extern int cp0_compare_irq_shift;
extern int cp0_perfcount_irq;
extern int cp0_fdc_irq;
extern int __weak get_c0_fdc_int(void);
void arch_trigger_all_cpu_backtrace(bool);
#define arch_trigger_all_cpu_backtrace arch_trigger_all_cpu_backtrace

12
arch/mips/kernel/traps.c
View File

@ -1969,6 +1969,12 @@ int cp0_compare_irq_shift;
int cp0_perfcount_irq;
EXPORT_SYMBOL_GPL(cp0_perfcount_irq);
/*
* Fast debug channel IRQ or -1 if not present
*/
int cp0_fdc_irq;
EXPORT_SYMBOL_GPL(cp0_fdc_irq);
static int noulri;
static int __init ulri_disable(char *s)
@ -2050,15 +2056,21 @@ void per_cpu_trap_init(bool is_boot_cpu)
*
* o read IntCtl.IPTI to determine the timer interrupt
* o read IntCtl.IPPCI to determine the performance counter interrupt
* o read IntCtl.IPFDC to determine the fast debug channel interrupt
*/
if (cpu_has_mips_r2_r6) {
cp0_compare_irq_shift = CAUSEB_TI - CAUSEB_IP;
cp0_compare_irq = (read_c0_intctl() >> INTCTLB_IPTI) & 7;
cp0_perfcount_irq = (read_c0_intctl() >> INTCTLB_IPPCI) & 7;
cp0_fdc_irq = (read_c0_intctl() >> INTCTLB_IPFDC) & 7;
if (!cp0_fdc_irq)
cp0_fdc_irq = -1;
} else {
cp0_compare_irq = CP0_LEGACY_COMPARE_IRQ;
cp0_compare_irq_shift = CP0_LEGACY_PERFCNT_IRQ;
cp0_perfcount_irq = -1;
cp0_fdc_irq = -1;
}
if (!cpu_data[cpu].asid_cache)