forked from luck/tmp_suning_uos_patched
gpio: sch: Add support for Intel Quark X1000 SoC
Intel Quark X1000 provides a total of 16 GPIOs. The GPIOs are split between the legacy I/O bridge and the GPIO controller. GPIO-SCH is the GPIO pins on legacy bridge for Intel Quark SoC. Intel Quark X1000 has 2 GPIOs powered by the core power well and 6 from the suspend power well. This piece of work is derived from Dan O'Donovan's initial work for Quark X1000 enabling. Signed-off-by: Chang Rebecca Swee Fun <rebecca.swee.fun.chang@intel.com> Reviewed-by: Mika Westerberg <mika.westerberg@linux.intel.com> Reviewed-by: Alexandre Courbot <acourbot@nvidia.com> Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
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@ -395,25 +395,32 @@ config GPIO_VR41XX
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Say yes here to support the NEC VR4100 series General-purpose I/O Uint
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config GPIO_SCH
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tristate "Intel SCH/TunnelCreek/Centerton GPIO"
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tristate "Intel SCH/TunnelCreek/Centerton/Quark X1000 GPIO"
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depends on PCI && X86
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select MFD_CORE
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select LPC_SCH
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help
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Say yes here to support GPIO interface on Intel Poulsbo SCH,
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Intel Tunnel Creek processor or Intel Centerton processor.
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Intel Tunnel Creek processor, Intel Centerton processor or
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Intel Quark X1000 SoC.
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The Intel SCH contains a total of 14 GPIO pins. Ten GPIOs are
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powered by the core power rail and are turned off during sleep
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modes (S3 and higher). The remaining four GPIOs are powered by
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the Intel SCH suspend power supply. These GPIOs remain
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active during S3. The suspend powered GPIOs can be used to wake the
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system from the Suspend-to-RAM state.
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The Intel Tunnel Creek processor has 5 GPIOs powered by the
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core power rail and 9 from suspend power supply.
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The Intel Centerton processor has a total of 30 GPIO pins.
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Twenty-one are powered by the core power rail and 9 from the
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suspend power supply.
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The Intel Quark X1000 SoC has 2 GPIOs powered by the core
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power well and 6 from the suspend power well.
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config GPIO_ICH
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tristate "Intel ICH GPIO"
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depends on PCI && X86
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@ -230,6 +230,12 @@ static int sch_gpio_probe(struct platform_device *pdev)
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sch->chip.ngpio = 30;
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break;
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case PCI_DEVICE_ID_INTEL_QUARK_X1000_ILB:
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sch->core_base = 0;
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sch->resume_base = 2;
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sch->chip.ngpio = 8;
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break;
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default:
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return -ENODEV;
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}
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