forked from luck/tmp_suning_uos_patched
MIPS: ath79: fix a wrong IRQ number
The Ubiquiti XM board setup code uses an invalid IRQ number, because it if above of NR_IRQS. This leads to failed 'request_irq' calls: ath9k 0000:00:00.0: request_irq failed ath9k: probe of 0000:00:00.0 failed with error -22 Preserve some IRQ numbers for the built-in IRQ controller of PCI host controllers in the AR71XX/AR724X SoCs, and use the correct IRQ number in the board setup code. Signed-off-by: Gabor Juhos <juhosg@openwrt.org> Cc: linux-mips@linux-mips.org Patchwork: https://patchwork.linux-mips.org/patch/3495/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
parent
6015a856f1
commit
93ef85b559
|
@ -17,6 +17,8 @@
|
|||
#include <linux/ath9k_platform.h>
|
||||
#endif /* CONFIG_PCI */
|
||||
|
||||
#include <asm/mach-ath79/irq.h>
|
||||
|
||||
#include "machtypes.h"
|
||||
#include "dev-gpio-buttons.h"
|
||||
#include "dev-leds-gpio.h"
|
||||
|
@ -33,7 +35,6 @@
|
|||
#define UBNT_XM_KEYS_POLL_INTERVAL 20
|
||||
#define UBNT_XM_KEYS_DEBOUNCE_INTERVAL (3 * UBNT_XM_KEYS_POLL_INTERVAL)
|
||||
|
||||
#define UBNT_XM_PCI_IRQ 48
|
||||
#define UBNT_XM_EEPROM_ADDR (u8 *) KSEG1ADDR(0x1fff1000)
|
||||
|
||||
static struct gpio_led ubnt_xm_leds_gpio[] __initdata = {
|
||||
|
@ -86,7 +87,7 @@ static struct ath9k_platform_data ubnt_xm_eeprom_data;
|
|||
|
||||
static struct ar724x_pci_data ubnt_xm_pci_data[] = {
|
||||
{
|
||||
.irq = UBNT_XM_PCI_IRQ,
|
||||
.irq = ATH79_PCI_IRQ(0),
|
||||
.pdata = &ubnt_xm_eeprom_data,
|
||||
},
|
||||
};
|
||||
|
|
|
@ -10,11 +10,15 @@
|
|||
#define __ASM_MACH_ATH79_IRQ_H
|
||||
|
||||
#define MIPS_CPU_IRQ_BASE 0
|
||||
#define NR_IRQS 40
|
||||
#define NR_IRQS 46
|
||||
|
||||
#define ATH79_MISC_IRQ_BASE 8
|
||||
#define ATH79_MISC_IRQ_COUNT 32
|
||||
|
||||
#define ATH79_PCI_IRQ_BASE (ATH79_MISC_IRQ_BASE + ATH79_MISC_IRQ_COUNT)
|
||||
#define ATH79_PCI_IRQ_COUNT 6
|
||||
#define ATH79_PCI_IRQ(_x) (ATH79_PCI_IRQ_BASE + (_x))
|
||||
|
||||
#define ATH79_CPU_IRQ_IP2 (MIPS_CPU_IRQ_BASE + 2)
|
||||
#define ATH79_CPU_IRQ_USB (MIPS_CPU_IRQ_BASE + 3)
|
||||
#define ATH79_CPU_IRQ_GE0 (MIPS_CPU_IRQ_BASE + 4)
|
||||
|
|
Loading…
Reference in New Issue
Block a user