forked from luck/tmp_suning_uos_patched
dt-bindings: reset: Fix typo in imx8mq resets
Some of the mipi dsi resets were called IMX8MQ_RESET_MIPI_DIS__ instead of IMX8MQ_RESET_MIPI_DSI__ Since they're DSI related this looks like a typo. This fixes the only in tree user as well to not break bisecting. Signed-off-by: Guido Günther <agx@sigxcpu.org> Reviewed-by: Lucas Stach <l.stach@pengutronix.de> Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>
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@ -169,9 +169,9 @@ static const struct imx7_src_signal imx8mq_src_signals[IMX8MQ_RESET_NUM] = {
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[IMX8MQ_RESET_OTG2_PHY_RESET] = { SRC_USBOPHY2_RCR, BIT(0) },
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[IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N] = { SRC_MIPIPHY_RCR, BIT(1) },
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[IMX8MQ_RESET_MIPI_DSI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(2) },
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[IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
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[IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
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[IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
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[IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N] = { SRC_MIPIPHY_RCR, BIT(3) },
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[IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N] = { SRC_MIPIPHY_RCR, BIT(4) },
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[IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N] = { SRC_MIPIPHY_RCR, BIT(5) },
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[IMX8MQ_RESET_PCIEPHY] = { SRC_PCIEPHY_RCR,
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BIT(2) | BIT(1) },
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[IMX8MQ_RESET_PCIEPHY_PERST] = { SRC_PCIEPHY_RCR, BIT(3) },
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@ -220,9 +220,9 @@ static int imx8mq_reset_set(struct reset_controller_dev *rcdev,
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case IMX8MQ_RESET_PCIE_CTRL_APPS_EN:
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case IMX8MQ_RESET_PCIE2_CTRL_APPS_EN: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_RESET_N: /* fallthrough */
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case IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N: /* fallthrough */
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value = assert ? 0 : bit;
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@ -31,9 +31,9 @@
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#define IMX8MQ_RESET_OTG2_PHY_RESET 20
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#define IMX8MQ_RESET_MIPI_DSI_RESET_BYTE_N 21
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#define IMX8MQ_RESET_MIPI_DSI_RESET_N 22
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#define IMX8MQ_RESET_MIPI_DIS_DPI_RESET_N 23
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#define IMX8MQ_RESET_MIPI_DIS_ESC_RESET_N 24
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#define IMX8MQ_RESET_MIPI_DIS_PCLK_RESET_N 25
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#define IMX8MQ_RESET_MIPI_DSI_DPI_RESET_N 23
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#define IMX8MQ_RESET_MIPI_DSI_ESC_RESET_N 24
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#define IMX8MQ_RESET_MIPI_DSI_PCLK_RESET_N 25
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#define IMX8MQ_RESET_PCIEPHY 26
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#define IMX8MQ_RESET_PCIEPHY_PERST 27
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#define IMX8MQ_RESET_PCIE_CTRL_APPS_EN 28
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