forked from luck/tmp_suning_uos_patched
mmc: sunxi: Gate the clock when rate is 0
The MMC core assumes that the code will gate the clock when the bus frequency is set to 0, which we've been ignoring so far. Handle that. Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com> Tested-by: Florian Vaussard <florian.vaussard@heig-vd.ch> Acked-by: Chen-Yu Tsai <wens@csie.org> Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
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@ -765,6 +765,9 @@ static int sunxi_mmc_clk_set_rate(struct sunxi_mmc_host *host,
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if (ret)
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return ret;
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if (!ios->clock)
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return 0;
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/* 8 bit DDR requires a higher module clock */
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if (ios->timing == MMC_TIMING_MMC_DDR52 &&
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ios->bus_width == MMC_BUS_WIDTH_8)
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@ -882,7 +885,7 @@ static void sunxi_mmc_set_ios(struct mmc_host *mmc, struct mmc_ios *ios)
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mmc_writel(host, REG_GCTRL, rval);
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/* set up clock */
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if (ios->clock && ios->power_mode) {
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if (ios->power_mode) {
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host->ferror = sunxi_mmc_clk_set_rate(host, ios);
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/* Android code had a usleep_range(50000, 55000); here */
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}
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