forked from luck/tmp_suning_uos_patched
[ARM] 5339/1: fix __fls() on ARM
Commit 0c65f459ce
intended to fix truncation issues with fls() on
ARMv5+ by renaming it to __fls() and wrapping it into a C function.
However that didn't take into account the fact that __fls() already
already had different semantics in the kernel.
Let's move the __fls() code into fls() function directly, and redefine
__fls() with the appropriate semantics. While at it, bring a generic
__fls() definition for pre ARMv5 too.
Signed-off-by: Nicolas Pitre <nico@marvell.com>
Signed-off-by: Russell King <rmk+kernel@arm.linux.org.uk>
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@ -237,6 +237,7 @@ extern int _find_next_bit_be(const unsigned long *p, int size, int offset);
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#if __LINUX_ARM_ARCH__ < 5
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#include <asm-generic/bitops/ffz.h>
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#include <asm-generic/bitops/__fls.h>
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#include <asm-generic/bitops/__ffs.h>
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#include <asm-generic/bitops/fls.h>
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#include <asm-generic/bitops/ffs.h>
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@ -277,16 +278,19 @@ static inline int constant_fls(int x)
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* the clz instruction for much better code efficiency.
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*/
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#define __fls(x) \
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( __builtin_constant_p(x) ? constant_fls(x) : \
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({ int __r; asm("clz\t%0, %1" : "=r"(__r) : "r"(x) : "cc"); 32-__r; }) )
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/* Implement fls() in C so that 64-bit args are suitably truncated */
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static inline int fls(int x)
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{
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return __fls(x);
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int ret;
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if (__builtin_constant_p(x))
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return constant_fls(x);
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asm("clz\t%0, %1" : "=r" (ret) : "r" (x) : "cc");
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ret = 32 - ret;
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return ret;
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}
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#define __fls(x) (fls(x) - 1)
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#define ffs(x) ({ unsigned long __t = (x); fls(__t & -__t); })
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#define __ffs(x) (ffs(x) - 1)
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#define ffz(x) __ffs( ~(x) )
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