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ARM: S5PV310: Tidy init+disable clock usage and s3c24xx_register_clocks cleanup

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This patch changes the clock registration code to use the s3c_register_clocks()
followed by s3c_disable_clocks() instead of the loops it was using and cleanups
the return of s3c24xx_register_clocks() because it includes it.

Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
This commit is contained in:
Kukjin Kim 2011-01-04 17:58:22 +09:00
parent 3c0fa64715
commit 957c461e82
1 changed files with 4 additions and 15 deletions
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19
arch/arm/mach-s5pv310/clock.c
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@ -384,7 +384,7 @@ static struct clksrc_clk clk_sclk_vpll = {
.reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 }, .reg_src = { .reg = S5P_CLKSRC_TOP0, .shift = 8, .size = 1 },
}; };
static struct clk init_clocks_disable[] = { static struct clk init_clocks_off[] = {
{ {
.name = "timers", .name = "timers",
.id = -1, .id = -1,
@ -1061,13 +1061,9 @@ static struct clk *clks[] __initdata = {
void __init s5pv310_register_clocks(void) void __init s5pv310_register_clocks(void)
{ {
struct clk *clkp;
int ret;
int ptr; int ptr;
ret = s3c24xx_register_clocks(clks, ARRAY_SIZE(clks)); s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
if (ret > 0)
printk(KERN_ERR "Failed to register %u clocks\n", ret);
for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++) for (ptr = 0; ptr < ARRAY_SIZE(sysclks); ptr++)
s3c_register_clksrc(sysclks[ptr], 1); s3c_register_clksrc(sysclks[ptr], 1);
@ -1075,15 +1071,8 @@ void __init s5pv310_register_clocks(void)
s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs)); s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks)); s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
clkp = init_clocks_disable; s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) { s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
ret = s3c24xx_register_clock(clkp);
if (ret < 0) {
printk(KERN_ERR "Failed to register clock %s (%d)\n",
clkp->name, ret);
}
(clkp->enable)(clkp, 0);
}
s3c_pwmclk_init(); s3c_pwmclk_init();
} }