spi/bfin_spi: sync hardware state before reprogramming everything

Sometimes under load, the Blackfin core is able to send SPI register
updates out before the controller is actually disabled.  So when we
go to reprogram the entire state (to switch to a different slave),
make sure we sync after disabling the controller.

Signed-off-by: Barry Song <barry.song@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This commit is contained in:
Barry Song 2009-11-30 03:49:41 +00:00 committed by Mike Frysinger
parent b052fd0a44
commit 9677b0de10

View File

@ -247,6 +247,8 @@ static void bfin_spi_restore_state(struct master_data *drv_data)
bfin_spi_disable(drv_data); bfin_spi_disable(drv_data);
dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n"); dev_dbg(&drv_data->pdev->dev, "restoring spi ctl state\n");
SSYNC();
/* Load the registers */ /* Load the registers */
write_CTRL(drv_data, chip->ctl_reg); write_CTRL(drv_data, chip->ctl_reg);
write_BAUD(drv_data, chip->baud); write_BAUD(drv_data, chip->baud);