forked from luck/tmp_suning_uos_patched
iwlwifi: dma mapping read and write changes
When iwlwifi runs on IOMMU, IOMMU generates a lot of PTE write faults because PTE write bit is not set on some of PTE's. This is because iwlwifi driver calls DMA mapping with PCI_DMA_TODEVICE which is read only in mapping PTE. But iwlwifi device actually writes to the mapped page to update its contents. This issue is not exposed in swiotlb. But VT-d hardware can capture this fault and stop the fault transaction. The iwl TX command contains a scratch field that is updated by uCode to indicate retry counts. For 5000 series the patch is required also for regular frames, but this patch does not differenciate. Signed-off-by: Fenghua Yu <fenghua.yu@intel.com> Acked-by: Tomas Winkler <tomas.winkler@intel.com> Signed-off-by: Reinette Chatre <reinette.chatre@intel.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -444,7 +444,7 @@ void iwl_hw_txq_free_tfd(struct iwl_priv *priv, struct iwl_tx_queue *txq)
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pci_unmap_single(dev,
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pci_unmap_single(dev,
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pci_unmap_addr(&txq->cmd[index]->meta, mapping),
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pci_unmap_addr(&txq->cmd[index]->meta, mapping),
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pci_unmap_len(&txq->cmd[index]->meta, len),
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pci_unmap_len(&txq->cmd[index]->meta, len),
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PCI_DMA_TODEVICE);
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PCI_DMA_BIDIRECTIONAL);
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/* Unmap chunks, if any. */
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/* Unmap chunks, if any. */
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for (i = 1; i < num_tbs; i++) {
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for (i = 1; i < num_tbs; i++) {
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@ -819,7 +819,7 @@ int iwl_tx_skb(struct iwl_priv *priv, struct sk_buff *skb)
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* within command buffer array. */
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* within command buffer array. */
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txcmd_phys = pci_map_single(priv->pci_dev,
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txcmd_phys = pci_map_single(priv->pci_dev,
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out_cmd, sizeof(struct iwl_cmd),
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out_cmd, sizeof(struct iwl_cmd),
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PCI_DMA_TODEVICE);
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PCI_DMA_BIDIRECTIONAL);
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pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
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pci_unmap_addr_set(&out_cmd->meta, mapping, txcmd_phys);
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pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
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pci_unmap_len_set(&out_cmd->meta, len, sizeof(struct iwl_cmd));
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/* Add buffer containing Tx command and MAC(!) header to TFD's
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/* Add buffer containing Tx command and MAC(!) header to TFD's
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@ -968,7 +968,7 @@ int iwl_enqueue_hcmd(struct iwl_priv *priv, struct iwl_host_cmd *cmd)
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IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
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IWL_MAX_SCAN_SIZE : sizeof(struct iwl_cmd);
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phys_addr = pci_map_single(priv->pci_dev, out_cmd,
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phys_addr = pci_map_single(priv->pci_dev, out_cmd,
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len, PCI_DMA_TODEVICE);
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len, PCI_DMA_BIDIRECTIONAL);
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pci_unmap_addr_set(&out_cmd->meta, mapping, phys_addr);
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pci_unmap_addr_set(&out_cmd->meta, mapping, phys_addr);
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pci_unmap_len_set(&out_cmd->meta, len, len);
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pci_unmap_len_set(&out_cmd->meta, len, len);
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phys_addr += offsetof(struct iwl_cmd, hdr);
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phys_addr += offsetof(struct iwl_cmd, hdr);
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@ -1068,7 +1068,7 @@ static void iwl_hcmd_queue_reclaim(struct iwl_priv *priv, int txq_id,
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pci_unmap_single(priv->pci_dev,
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pci_unmap_single(priv->pci_dev,
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pci_unmap_addr(&txq->cmd[cmd_idx]->meta, mapping),
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pci_unmap_addr(&txq->cmd[cmd_idx]->meta, mapping),
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pci_unmap_len(&txq->cmd[cmd_idx]->meta, len),
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pci_unmap_len(&txq->cmd[cmd_idx]->meta, len),
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PCI_DMA_TODEVICE);
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PCI_DMA_BIDIRECTIONAL);
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for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
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for (idx = iwl_queue_inc_wrap(idx, q->n_bd); q->read_ptr != idx;
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q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
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q->read_ptr = iwl_queue_inc_wrap(q->read_ptr, q->n_bd)) {
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