forked from luck/tmp_suning_uos_patched
ixgbe: DCB, fix TX hang occurring in stress condition with PFC
The DCB credits refill quantum _must_ be greater than half the max packet size. This is needed to guarantee that TX DMA operations are not attempted during a pause state. Additionally, the min IFG must be set correctly for DCB mode. If a DMA operation is requested unexpectedly during the pause state the HW data store may be corrupted leading to a DMA hang. The DMA hang requires a reset to correct. This fixes the HW configuration to avoid this condition. Signed-off-by: John Fastabend <john.r.fastabend@intel.com> Tested-by: Ross Brattain <ross.b.brattain@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
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affa9dfb04
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9806307a1c
@ -43,9 +43,12 @@
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* ixgbe_dcb_check_config().
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*/
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s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config,
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u8 direction)
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int max_frame, u8 direction)
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{
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struct tc_bw_alloc *p;
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int min_credit;
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int min_multiplier;
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int min_percent = 100;
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s32 ret_val = 0;
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/* Initialization values default for Tx settings */
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u32 credit_refill = 0;
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@ -59,6 +62,31 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config,
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goto out;
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}
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min_credit = ((max_frame / 2) + DCB_CREDIT_QUANTUM - 1) /
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DCB_CREDIT_QUANTUM;
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/* Find smallest link percentage */
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for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
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p = &dcb_config->tc_config[i].path[direction];
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bw_percent = dcb_config->bw_percentage[direction][p->bwg_id];
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link_percentage = p->bwg_percent;
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link_percentage = (link_percentage * bw_percent) / 100;
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if (link_percentage && link_percentage < min_percent)
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min_percent = link_percentage;
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}
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/*
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* The ratio between traffic classes will control the bandwidth
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* percentages seen on the wire. To calculate this ratio we use
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* a multiplier. It is required that the refill credits must be
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* larger than the max frame size so here we find the smallest
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* multiplier that will allow all bandwidth percentages to be
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* greater than the max frame size.
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*/
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min_multiplier = (min_credit / min_percent) + 1;
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/* Find out the link percentage for each TC first */
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for (i = 0; i < MAX_TRAFFIC_CLASS; i++) {
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p = &dcb_config->tc_config[i].path[direction];
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@ -73,8 +101,9 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config,
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/* Save link_percentage for reference */
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p->link_percent = (u8)link_percentage;
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/* Calculate credit refill and save it */
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credit_refill = link_percentage * MINIMUM_CREDIT_REFILL;
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/* Calculate credit refill ratio using multiplier */
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credit_refill = min(link_percentage * min_multiplier,
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MAX_CREDIT_REFILL);
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p->data_credits_refill = (u16)credit_refill;
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/* Calculate maximum credit for the TC */
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@ -85,8 +114,8 @@ s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *dcb_config,
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* of a TC is too small, the maximum credit may not be
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* enough to send out a jumbo frame in data plane arbitration.
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*/
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if (credit_max && (credit_max < MINIMUM_CREDIT_FOR_JUMBO))
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credit_max = MINIMUM_CREDIT_FOR_JUMBO;
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if (credit_max && (credit_max < min_credit))
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credit_max = min_credit;
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if (direction == DCB_TX_CONFIG) {
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/*
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@ -150,15 +150,14 @@ struct ixgbe_dcb_config {
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/* DCB driver APIs */
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/* DCB credits calculation */
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s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *, u8);
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s32 ixgbe_dcb_calculate_tc_credits(struct ixgbe_dcb_config *, int, u8);
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/* DCB hw initialization */
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s32 ixgbe_dcb_hw_config(struct ixgbe_hw *, struct ixgbe_dcb_config *);
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/* DCB definitions for credit calculation */
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#define DCB_CREDIT_QUANTUM 64 /* DCB Quantum */
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#define MAX_CREDIT_REFILL 511 /* 0x1FF * 64B = 32704B */
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#define MINIMUM_CREDIT_REFILL 5 /* 5*64B = 320B */
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#define MINIMUM_CREDIT_FOR_JUMBO 145 /* 145= UpperBound((9*1024+54)/64B) for 9KB jumbo frame */
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#define DCB_MAX_TSO_SIZE (32*1024) /* MAX TSO packet size supported in DCB mode */
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#define MINIMUM_CREDIT_FOR_TSO (DCB_MAX_TSO_SIZE/64 + 1) /* 513 for 32KB TSO packet */
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#define MAX_CREDIT 4095 /* Maximum credit supported: 256KB * 1204 / 64B */
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@ -397,6 +397,11 @@ static s32 ixgbe_dcb_config_82599(struct ixgbe_hw *hw)
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reg &= ~IXGBE_RTTDCS_ARBDIS;
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IXGBE_WRITE_REG(hw, IXGBE_RTTDCS, reg);
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/* Enable Security TX Buffer IFG for DCB */
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reg = IXGBE_READ_REG(hw, IXGBE_SECTXMINIFG);
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reg |= IXGBE_SECTX_DCB;
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IXGBE_WRITE_REG(hw, IXGBE_SECTXMINIFG, reg);
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return 0;
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}
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@ -95,6 +95,9 @@
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#define IXGBE_TXPBTHRESH_DCB 0xA /* THRESH value for DCB mode */
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/* SECTXMINIFG DCB */
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#define IXGBE_SECTX_DCB 0x00001F00 /* DCB TX Buffer IFG */
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/* DCB hardware-specific driver APIs */
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@ -3347,6 +3347,7 @@ static void ixgbe_napi_disable_all(struct ixgbe_adapter *adapter)
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static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
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{
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struct ixgbe_hw *hw = &adapter->hw;
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int max_frame = adapter->netdev->mtu + ETH_HLEN + ETH_FCS_LEN;
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u32 txdctl;
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int i, j;
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@ -3359,8 +3360,15 @@ static void ixgbe_configure_dcb(struct ixgbe_adapter *adapter)
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if (hw->mac.type == ixgbe_mac_82598EB)
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netif_set_gso_max_size(adapter->netdev, 32768);
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ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_TX_CONFIG);
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ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, DCB_RX_CONFIG);
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#ifdef CONFIG_FCOE
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if (adapter->netdev->features & NETIF_F_FCOE_MTU)
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max_frame = max(max_frame, IXGBE_FCOE_JUMBO_FRAME_SIZE);
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#endif
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ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, max_frame,
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DCB_TX_CONFIG);
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ixgbe_dcb_calculate_tc_credits(&adapter->dcb_cfg, max_frame,
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DCB_RX_CONFIG);
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/* reconfigure the hardware */
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ixgbe_dcb_hw_config(&adapter->hw, &adapter->dcb_cfg);
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