forked from luck/tmp_suning_uos_patched
Merge branch 'ena-bug-fixes'
Netanel Belgazal says: ==================== Bug Fixes in ENA driver Changes from V3: * Rebase patchset to master and solve merge conflicts. * Remove redundant bug fix (fix error handling when probe fails) ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
This commit is contained in:
David S. Miller
commit
9878f60240
@ -631,22 +631,22 @@ enum ena_admin_flow_hash_proto {
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/* RSS flow hash fields */
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enum ena_admin_flow_hash_fields {
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/* Ethernet Dest Addr */
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ENA_ADMIN_RSS_L2_DA = 0,
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ENA_ADMIN_RSS_L2_DA = BIT(0),
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/* Ethernet Src Addr */
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ENA_ADMIN_RSS_L2_SA = 1,
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ENA_ADMIN_RSS_L2_SA = BIT(1),
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/* ipv4/6 Dest Addr */
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ENA_ADMIN_RSS_L3_DA = 2,
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ENA_ADMIN_RSS_L3_DA = BIT(2),
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/* ipv4/6 Src Addr */
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ENA_ADMIN_RSS_L3_SA = 5,
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ENA_ADMIN_RSS_L3_SA = BIT(3),
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/* tcp/udp Dest Port */
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ENA_ADMIN_RSS_L4_DP = 6,
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ENA_ADMIN_RSS_L4_DP = BIT(4),
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/* tcp/udp Src Port */
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ENA_ADMIN_RSS_L4_SP = 7,
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ENA_ADMIN_RSS_L4_SP = BIT(5),
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};
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struct ena_admin_proto_input {
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@ -873,6 +873,14 @@ struct ena_admin_aenq_link_change_desc {
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u32 flags;
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};
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struct ena_admin_aenq_keep_alive_desc {
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struct ena_admin_aenq_common_desc aenq_common_desc;
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u32 rx_drops_low;
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u32 rx_drops_high;
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};
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struct ena_admin_ena_mmio_req_read_less_resp {
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u16 req_id;
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@ -36,9 +36,9 @@
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/*****************************************************************************/
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/* Timeout in micro-sec */
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#define ADMIN_CMD_TIMEOUT_US (1000000)
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#define ADMIN_CMD_TIMEOUT_US (3000000)
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#define ENA_ASYNC_QUEUE_DEPTH 4
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#define ENA_ASYNC_QUEUE_DEPTH 16
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#define ENA_ADMIN_QUEUE_DEPTH 32
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#define MIN_ENA_VER (((ENA_COMMON_SPEC_VERSION_MAJOR) << \
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@ -784,7 +784,7 @@ static int ena_com_get_feature_ex(struct ena_com_dev *ena_dev,
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int ret;
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if (!ena_com_check_supported_feature_id(ena_dev, feature_id)) {
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pr_info("Feature %d isn't supported\n", feature_id);
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pr_debug("Feature %d isn't supported\n", feature_id);
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return -EPERM;
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}
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@ -1126,7 +1126,13 @@ int ena_com_execute_admin_command(struct ena_com_admin_queue *admin_queue,
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comp_ctx = ena_com_submit_admin_cmd(admin_queue, cmd, cmd_size,
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comp, comp_size);
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if (unlikely(IS_ERR(comp_ctx))) {
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pr_err("Failed to submit command [%ld]\n", PTR_ERR(comp_ctx));
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if (comp_ctx == ERR_PTR(-ENODEV))
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pr_debug("Failed to submit command [%ld]\n",
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PTR_ERR(comp_ctx));
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else
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pr_err("Failed to submit command [%ld]\n",
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PTR_ERR(comp_ctx));
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return PTR_ERR(comp_ctx);
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}
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@ -1895,7 +1901,7 @@ int ena_com_set_dev_mtu(struct ena_com_dev *ena_dev, int mtu)
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int ret;
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if (!ena_com_check_supported_feature_id(ena_dev, ENA_ADMIN_MTU)) {
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pr_info("Feature %d isn't supported\n", ENA_ADMIN_MTU);
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pr_debug("Feature %d isn't supported\n", ENA_ADMIN_MTU);
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return -EPERM;
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}
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@ -1948,8 +1954,8 @@ int ena_com_set_hash_function(struct ena_com_dev *ena_dev)
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if (!ena_com_check_supported_feature_id(ena_dev,
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ENA_ADMIN_RSS_HASH_FUNCTION)) {
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pr_info("Feature %d isn't supported\n",
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ENA_ADMIN_RSS_HASH_FUNCTION);
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pr_debug("Feature %d isn't supported\n",
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ENA_ADMIN_RSS_HASH_FUNCTION);
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return -EPERM;
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}
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@ -2112,7 +2118,8 @@ int ena_com_set_hash_ctrl(struct ena_com_dev *ena_dev)
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if (!ena_com_check_supported_feature_id(ena_dev,
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ENA_ADMIN_RSS_HASH_INPUT)) {
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pr_info("Feature %d isn't supported\n", ENA_ADMIN_RSS_HASH_INPUT);
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pr_debug("Feature %d isn't supported\n",
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ENA_ADMIN_RSS_HASH_INPUT);
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return -EPERM;
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}
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@ -2184,7 +2191,7 @@ int ena_com_set_default_hash_ctrl(struct ena_com_dev *ena_dev)
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hash_ctrl->selected_fields[ENA_ADMIN_RSS_IP4_FRAG].fields =
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ENA_ADMIN_RSS_L3_SA | ENA_ADMIN_RSS_L3_DA;
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hash_ctrl->selected_fields[ENA_ADMIN_RSS_IP4_FRAG].fields =
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hash_ctrl->selected_fields[ENA_ADMIN_RSS_NOT_IP].fields =
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ENA_ADMIN_RSS_L2_DA | ENA_ADMIN_RSS_L2_SA;
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for (i = 0; i < ENA_ADMIN_RSS_PROTO_NUM; i++) {
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@ -2270,8 +2277,8 @@ int ena_com_indirect_table_set(struct ena_com_dev *ena_dev)
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if (!ena_com_check_supported_feature_id(
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ena_dev, ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG)) {
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pr_info("Feature %d isn't supported\n",
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ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG);
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pr_debug("Feature %d isn't supported\n",
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ENA_ADMIN_RSS_REDIRECTION_TABLE_CONFIG);
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return -EPERM;
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}
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@ -2444,11 +2451,9 @@ int ena_com_set_host_attributes(struct ena_com_dev *ena_dev)
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int ret;
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if (!ena_com_check_supported_feature_id(ena_dev,
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ENA_ADMIN_HOST_ATTR_CONFIG)) {
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pr_warn("Set host attribute isn't supported\n");
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return -EPERM;
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}
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/* Host attribute config is called before ena_com_get_dev_attr_feat
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* so ena_com can't check if the feature is supported.
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*/
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memset(&cmd, 0x0, sizeof(cmd));
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admin_queue = &ena_dev->admin_queue;
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@ -2542,8 +2547,8 @@ int ena_com_init_interrupt_moderation(struct ena_com_dev *ena_dev)
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if (rc) {
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if (rc == -EPERM) {
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pr_info("Feature %d isn't supported\n",
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ENA_ADMIN_INTERRUPT_MODERATION);
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pr_debug("Feature %d isn't supported\n",
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ENA_ADMIN_INTERRUPT_MODERATION);
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rc = 0;
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} else {
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pr_err("Failed to get interrupt moderation admin cmd. rc: %d\n",
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@ -33,6 +33,7 @@
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#ifndef ENA_COM
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#define ENA_COM
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#include <linux/compiler.h>
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#include <linux/delay.h>
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#include <linux/dma-mapping.h>
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#include <linux/gfp.h>
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@ -45,7 +45,7 @@ static inline struct ena_eth_io_rx_cdesc_base *ena_com_get_next_rx_cdesc(
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cdesc = (struct ena_eth_io_rx_cdesc_base *)(io_cq->cdesc_addr.virt_addr
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+ (head_masked * io_cq->cdesc_entry_size_in_bytes));
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desc_phase = (cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK) >>
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desc_phase = (READ_ONCE(cdesc->status) & ENA_ETH_IO_RX_CDESC_BASE_PHASE_MASK) >>
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ENA_ETH_IO_RX_CDESC_BASE_PHASE_SHIFT;
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if (desc_phase != expected_phase)
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@ -141,7 +141,7 @@ static inline u16 ena_com_cdesc_rx_pkt_get(struct ena_com_io_cq *io_cq,
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ena_com_cq_inc_head(io_cq);
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count++;
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last = (cdesc->status & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >>
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last = (READ_ONCE(cdesc->status) & ENA_ETH_IO_RX_CDESC_BASE_LAST_MASK) >>
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ENA_ETH_IO_RX_CDESC_BASE_LAST_SHIFT;
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} while (!last);
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@ -489,13 +489,13 @@ int ena_com_tx_comp_req_id_get(struct ena_com_io_cq *io_cq, u16 *req_id)
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* expected, it mean that the device still didn't update
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* this completion.
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*/
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cdesc_phase = cdesc->flags & ENA_ETH_IO_TX_CDESC_PHASE_MASK;
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cdesc_phase = READ_ONCE(cdesc->flags) & ENA_ETH_IO_TX_CDESC_PHASE_MASK;
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if (cdesc_phase != expected_phase)
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return -EAGAIN;
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ena_com_cq_inc_head(io_cq);
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*req_id = cdesc->req_id;
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*req_id = READ_ONCE(cdesc->req_id);
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return 0;
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}
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@ -80,14 +80,18 @@ static void ena_tx_timeout(struct net_device *dev)
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{
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struct ena_adapter *adapter = netdev_priv(dev);
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/* Change the state of the device to trigger reset
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* Check that we are not in the middle or a trigger already
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*/
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if (test_and_set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
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return;
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u64_stats_update_begin(&adapter->syncp);
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adapter->dev_stats.tx_timeout++;
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u64_stats_update_end(&adapter->syncp);
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netif_err(adapter, tx_err, dev, "Transmit time out\n");
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/* Change the state of the device to trigger reset */
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set_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
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}
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static void update_rx_ring_mtu(struct ena_adapter *adapter, int mtu)
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@ -559,6 +563,7 @@ static void ena_free_all_rx_bufs(struct ena_adapter *adapter)
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*/
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static void ena_free_tx_bufs(struct ena_ring *tx_ring)
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{
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bool print_once = true;
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u32 i;
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for (i = 0; i < tx_ring->ring_size; i++) {
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@ -570,9 +575,16 @@ static void ena_free_tx_bufs(struct ena_ring *tx_ring)
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if (!tx_info->skb)
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continue;
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netdev_notice(tx_ring->netdev,
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"free uncompleted tx skb qid %d idx 0x%x\n",
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tx_ring->qid, i);
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if (print_once) {
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netdev_notice(tx_ring->netdev,
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"free uncompleted tx skb qid %d idx 0x%x\n",
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tx_ring->qid, i);
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print_once = false;
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} else {
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netdev_dbg(tx_ring->netdev,
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"free uncompleted tx skb qid %d idx 0x%x\n",
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tx_ring->qid, i);
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}
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ena_buf = tx_info->bufs;
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dma_unmap_single(tx_ring->dev,
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@ -1109,7 +1121,8 @@ static int ena_io_poll(struct napi_struct *napi, int budget)
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tx_budget = tx_ring->ring_size / ENA_TX_POLL_BUDGET_DIVIDER;
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if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags)) {
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if (!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
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test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags)) {
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napi_complete_done(napi, 0);
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return 0;
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}
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@ -1117,26 +1130,40 @@ static int ena_io_poll(struct napi_struct *napi, int budget)
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tx_work_done = ena_clean_tx_irq(tx_ring, tx_budget);
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rx_work_done = ena_clean_rx_irq(rx_ring, napi, budget);
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if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
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napi_complete_done(napi, rx_work_done);
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/* If the device is about to reset or down, avoid unmask
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* the interrupt and return 0 so NAPI won't reschedule
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*/
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if (unlikely(!test_bit(ENA_FLAG_DEV_UP, &tx_ring->adapter->flags) ||
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test_bit(ENA_FLAG_TRIGGER_RESET, &tx_ring->adapter->flags))) {
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napi_complete_done(napi, 0);
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ret = 0;
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} else if ((budget > rx_work_done) && (tx_budget > tx_work_done)) {
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napi_comp_call = 1;
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/* Tx and Rx share the same interrupt vector */
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if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
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ena_adjust_intr_moderation(rx_ring, tx_ring);
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/* Update intr register: rx intr delay, tx intr delay and
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* interrupt unmask
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/* Update numa and unmask the interrupt only when schedule
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* from the interrupt context (vs from sk_busy_loop)
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*/
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ena_com_update_intr_reg(&intr_reg,
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rx_ring->smoothed_interval,
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tx_ring->smoothed_interval,
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true);
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if (napi_complete_done(napi, rx_work_done)) {
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/* Tx and Rx share the same interrupt vector */
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if (ena_com_get_adaptive_moderation_enabled(rx_ring->ena_dev))
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ena_adjust_intr_moderation(rx_ring, tx_ring);
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/* Update intr register: rx intr delay,
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* tx intr delay and interrupt unmask
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*/
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ena_com_update_intr_reg(&intr_reg,
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rx_ring->smoothed_interval,
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tx_ring->smoothed_interval,
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true);
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/* It is a shared MSI-X.
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* Tx and Rx CQ have pointer to it.
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* So we use one of them to reach the intr reg
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*/
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ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
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}
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/* It is a shared MSI-X. Tx and Rx CQ have pointer to it.
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* So we use one of them to reach the intr reg
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*/
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ena_com_unmask_intr(rx_ring->ena_com_io_cq, &intr_reg);
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ena_update_ring_numa_node(tx_ring, rx_ring);
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@ -1698,12 +1725,22 @@ static void ena_down(struct ena_adapter *adapter)
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adapter->dev_stats.interface_down++;
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u64_stats_update_end(&adapter->syncp);
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/* After this point the napi handler won't enable the tx queue */
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ena_napi_disable_all(adapter);
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netif_carrier_off(adapter->netdev);
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netif_tx_disable(adapter->netdev);
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/* After this point the napi handler won't enable the tx queue */
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ena_napi_disable_all(adapter);
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/* After destroy the queue there won't be any new interrupts */
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if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags)) {
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int rc;
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rc = ena_com_dev_reset(adapter->ena_dev);
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if (rc)
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dev_err(&adapter->pdev->dev, "Device reset failed\n");
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}
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ena_destroy_all_io_queues(adapter);
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ena_disable_io_intr_sync(adapter);
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@ -2065,6 +2102,14 @@ static void ena_netpoll(struct net_device *netdev)
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struct ena_adapter *adapter = netdev_priv(netdev);
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int i;
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/* Dont schedule NAPI if the driver is in the middle of reset
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* or netdev is down.
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*/
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if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags) ||
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test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
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return;
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for (i = 0; i < adapter->num_queues; i++)
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napi_schedule(&adapter->ena_napi[i].napi);
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}
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@ -2169,28 +2214,46 @@ static void ena_get_stats64(struct net_device *netdev,
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struct rtnl_link_stats64 *stats)
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{
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struct ena_adapter *adapter = netdev_priv(netdev);
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struct ena_admin_basic_stats ena_stats;
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int rc;
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struct ena_ring *rx_ring, *tx_ring;
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unsigned int start;
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u64 rx_drops;
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int i;
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if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
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return;
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rc = ena_com_get_dev_basic_stats(adapter->ena_dev, &ena_stats);
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if (rc)
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return;
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for (i = 0; i < adapter->num_queues; i++) {
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u64 bytes, packets;
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stats->tx_bytes = ((u64)ena_stats.tx_bytes_high << 32) |
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ena_stats.tx_bytes_low;
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stats->rx_bytes = ((u64)ena_stats.rx_bytes_high << 32) |
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ena_stats.rx_bytes_low;
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tx_ring = &adapter->tx_ring[i];
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stats->rx_packets = ((u64)ena_stats.rx_pkts_high << 32) |
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ena_stats.rx_pkts_low;
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stats->tx_packets = ((u64)ena_stats.tx_pkts_high << 32) |
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ena_stats.tx_pkts_low;
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do {
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start = u64_stats_fetch_begin_irq(&tx_ring->syncp);
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packets = tx_ring->tx_stats.cnt;
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bytes = tx_ring->tx_stats.bytes;
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} while (u64_stats_fetch_retry_irq(&tx_ring->syncp, start));
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stats->rx_dropped = ((u64)ena_stats.rx_drops_high << 32) |
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ena_stats.rx_drops_low;
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stats->tx_packets += packets;
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stats->tx_bytes += bytes;
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rx_ring = &adapter->rx_ring[i];
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do {
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start = u64_stats_fetch_begin_irq(&rx_ring->syncp);
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packets = rx_ring->rx_stats.cnt;
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bytes = rx_ring->rx_stats.bytes;
|
||||
} while (u64_stats_fetch_retry_irq(&rx_ring->syncp, start));
|
||||
|
||||
stats->rx_packets += packets;
|
||||
stats->rx_bytes += bytes;
|
||||
}
|
||||
|
||||
do {
|
||||
start = u64_stats_fetch_begin_irq(&adapter->syncp);
|
||||
rx_drops = adapter->dev_stats.rx_drops;
|
||||
} while (u64_stats_fetch_retry_irq(&adapter->syncp, start));
|
||||
|
||||
stats->rx_dropped = rx_drops;
|
||||
|
||||
stats->multicast = 0;
|
||||
stats->collisions = 0;
|
||||
@ -2351,6 +2414,8 @@ static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
|
||||
*/
|
||||
ena_com_set_admin_polling_mode(ena_dev, true);
|
||||
|
||||
ena_config_host_info(ena_dev);
|
||||
|
||||
/* Get Device Attributes*/
|
||||
rc = ena_com_get_dev_attr_feat(ena_dev, get_feat_ctx);
|
||||
if (rc) {
|
||||
@ -2375,11 +2440,10 @@ static int ena_device_init(struct ena_com_dev *ena_dev, struct pci_dev *pdev,
|
||||
|
||||
*wd_state = !!(aenq_groups & BIT(ENA_ADMIN_KEEP_ALIVE));
|
||||
|
||||
ena_config_host_info(ena_dev);
|
||||
|
||||
return 0;
|
||||
|
||||
err_admin_init:
|
||||
ena_com_delete_host_info(ena_dev);
|
||||
ena_com_admin_destroy(ena_dev);
|
||||
err_mmio_read_less:
|
||||
ena_com_mmio_reg_read_request_destroy(ena_dev);
|
||||
@ -2431,6 +2495,14 @@ static void ena_fw_reset_device(struct work_struct *work)
|
||||
bool dev_up, wd_state;
|
||||
int rc;
|
||||
|
||||
if (unlikely(!test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
|
||||
dev_err(&pdev->dev,
|
||||
"device reset schedule while reset bit is off\n");
|
||||
return;
|
||||
}
|
||||
|
||||
netif_carrier_off(netdev);
|
||||
|
||||
del_timer_sync(&adapter->timer_service);
|
||||
|
||||
rtnl_lock();
|
||||
@ -2444,12 +2516,6 @@ static void ena_fw_reset_device(struct work_struct *work)
|
||||
*/
|
||||
ena_close(netdev);
|
||||
|
||||
rc = ena_com_dev_reset(ena_dev);
|
||||
if (rc) {
|
||||
dev_err(&pdev->dev, "Device reset failed\n");
|
||||
goto err;
|
||||
}
|
||||
|
||||
ena_free_mgmnt_irq(adapter);
|
||||
|
||||
ena_disable_msix(adapter);
|
||||
@ -2462,6 +2528,8 @@ static void ena_fw_reset_device(struct work_struct *work)
|
||||
|
||||
ena_com_mmio_reg_read_request_destroy(ena_dev);
|
||||
|
||||
clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags);
|
||||
|
||||
/* Finish with the destroy part. Start the init part */
|
||||
|
||||
rc = ena_device_init(ena_dev, adapter->pdev, &get_feat_ctx, &wd_state);
|
||||
@ -2507,6 +2575,8 @@ static void ena_fw_reset_device(struct work_struct *work)
|
||||
err:
|
||||
rtnl_unlock();
|
||||
|
||||
clear_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags);
|
||||
|
||||
dev_err(&pdev->dev,
|
||||
"Reset attempt failed. Can not reset the device\n");
|
||||
}
|
||||
@ -2525,6 +2595,9 @@ static void check_for_missing_tx_completions(struct ena_adapter *adapter)
|
||||
if (!test_bit(ENA_FLAG_DEV_UP, &adapter->flags))
|
||||
return;
|
||||
|
||||
if (test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))
|
||||
return;
|
||||
|
||||
budget = ENA_MONITORED_TX_QUEUES;
|
||||
|
||||
for (i = adapter->last_monitored_tx_qid; i < adapter->num_queues; i++) {
|
||||
@ -2624,7 +2697,7 @@ static void ena_timer_service(unsigned long data)
|
||||
if (host_info)
|
||||
ena_update_host_info(host_info, adapter->netdev);
|
||||
|
||||
if (unlikely(test_and_clear_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
|
||||
if (unlikely(test_bit(ENA_FLAG_TRIGGER_RESET, &adapter->flags))) {
|
||||
netif_err(adapter, drv, adapter->netdev,
|
||||
"Trigger reset is on\n");
|
||||
ena_dump_stats_to_dmesg(adapter);
|
||||
@ -2658,7 +2731,7 @@ static int ena_calc_io_queue_num(struct pci_dev *pdev,
|
||||
io_sq_num = get_feat_ctx->max_queues.max_sq_num;
|
||||
}
|
||||
|
||||
io_queue_num = min_t(int, num_possible_cpus(), ENA_MAX_NUM_IO_QUEUES);
|
||||
io_queue_num = min_t(int, num_online_cpus(), ENA_MAX_NUM_IO_QUEUES);
|
||||
io_queue_num = min_t(int, io_queue_num, io_sq_num);
|
||||
io_queue_num = min_t(int, io_queue_num,
|
||||
get_feat_ctx->max_queues.max_cq_num);
|
||||
@ -2720,7 +2793,6 @@ static void ena_set_dev_offloads(struct ena_com_dev_get_features_ctx *feat,
|
||||
netdev->features =
|
||||
dev_features |
|
||||
NETIF_F_SG |
|
||||
NETIF_F_NTUPLE |
|
||||
NETIF_F_RXHASH |
|
||||
NETIF_F_HIGHDMA;
|
||||
|
||||
@ -3116,7 +3188,9 @@ static void ena_remove(struct pci_dev *pdev)
|
||||
|
||||
cancel_work_sync(&adapter->resume_io_task);
|
||||
|
||||
ena_com_dev_reset(ena_dev);
|
||||
/* Reset the device only if the device is running. */
|
||||
if (test_bit(ENA_FLAG_DEVICE_RUNNING, &adapter->flags))
|
||||
ena_com_dev_reset(ena_dev);
|
||||
|
||||
ena_free_mgmnt_irq(adapter);
|
||||
|
||||
|
||||
@ -44,7 +44,7 @@
|
||||
#include "ena_eth_com.h"
|
||||
|
||||
#define DRV_MODULE_VER_MAJOR 1
|
||||
#define DRV_MODULE_VER_MINOR 0
|
||||
#define DRV_MODULE_VER_MINOR 1
|
||||
#define DRV_MODULE_VER_SUBMINOR 2
|
||||
|
||||
#define DRV_MODULE_NAME "ena"
|
||||
@ -100,7 +100,7 @@
|
||||
/* Number of queues to check for missing queues per timer service */
|
||||
#define ENA_MONITORED_TX_QUEUES 4
|
||||
/* Max timeout packets before device reset */
|
||||
#define MAX_NUM_OF_TIMEOUTED_PACKETS 32
|
||||
#define MAX_NUM_OF_TIMEOUTED_PACKETS 128
|
||||
|
||||
#define ENA_TX_RING_IDX_NEXT(idx, ring_size) (((idx) + 1) & ((ring_size) - 1))
|
||||
|
||||
@ -116,9 +116,9 @@
|
||||
#define ENA_IO_IRQ_IDX(q) (ENA_IO_IRQ_FIRST_IDX + (q))
|
||||
|
||||
/* ENA device should send keep alive msg every 1 sec.
|
||||
* We wait for 3 sec just to be on the safe side.
|
||||
* We wait for 6 sec just to be on the safe side.
|
||||
*/
|
||||
#define ENA_DEVICE_KALIVE_TIMEOUT (3 * HZ)
|
||||
#define ENA_DEVICE_KALIVE_TIMEOUT (6 * HZ)
|
||||
|
||||
#define ENA_MMIO_DISABLE_REG_READ BIT(0)
|
||||
|
||||
@ -241,6 +241,7 @@ struct ena_stats_dev {
|
||||
u64 interface_up;
|
||||
u64 interface_down;
|
||||
u64 admin_q_pause;
|
||||
u64 rx_drops;
|
||||
};
|
||||
|
||||
enum ena_flags_t {
|
||||
|
||||
Loading…
Reference in New Issue
Block a user