forked from luck/tmp_suning_uos_patched
bcma: update pci configuration for bcm4706/bcm4716
Update the PCI configuration for BCM4706 and BCM4716 per the 2011 Broadcom SDK. Signed-off-by: Nathan Hintz <nlhintz@hotmail.com> Signed-off-by: John W. Linville <linville@tuxdriver.com>
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@ -427,7 +427,7 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
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/* Reset RC */
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usleep_range(3000, 5000);
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pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST_OE);
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usleep_range(1000, 2000);
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msleep(50);
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pcicore_write32(pc, BCMA_CORE_PCI_CTL, BCMA_CORE_PCI_CTL_RST |
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BCMA_CORE_PCI_CTL_RST_OE);
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@ -489,6 +489,17 @@ void __devinit bcma_core_pci_hostmode_init(struct bcma_drv_pci *pc)
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bcma_core_pci_enable_crs(pc);
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if (bus->chipinfo.id == BCMA_CHIP_ID_BCM4706 ||
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bus->chipinfo.id == BCMA_CHIP_ID_BCM4716) {
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u16 val16;
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bcma_extpci_read_config(pc, 0, 0, BCMA_CORE_PCI_CFG_DEVCTRL,
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&val16, sizeof(val16));
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val16 |= (2 << 5); /* Max payload size of 512 */
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val16 |= (2 << 12); /* MRRS 512 */
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bcma_extpci_write_config(pc, 0, 0, BCMA_CORE_PCI_CFG_DEVCTRL,
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&val16, sizeof(val16));
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}
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/* Enable PCI bridge BAR0 memory & master access */
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tmp = PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
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bcma_extpci_write_config(pc, 0, 0, PCI_COMMAND, &tmp, sizeof(tmp));
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@ -179,6 +179,8 @@ struct pci_dev;
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#define BCMA_CORE_PCI_CFG_FUN_MASK 7 /* Function mask */
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#define BCMA_CORE_PCI_CFG_OFF_MASK 0xfff /* Register mask */
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#define BCMA_CORE_PCI_CFG_DEVCTRL 0xd8
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/* PCIE Root Capability Register bits (Host mode only) */
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#define BCMA_CORE_PCI_RC_CRS_VISIBILITY 0x0001
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