AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

Merge branch 'i2c/for-current-fixed' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux

Browse Source 
Pull i2c fixes from Wolfram Sang:
 "A few driver fixes for the I2C subsystem"

* 'i2c/for-current-fixed' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
  i2c: stm32f7: remove warning when compiling with W=1
  i2c: stm32f7: fix a race in slave mode with arbitration loss irq
  i2c: stm32f7: fix first byte to send in slave mode
  i2c: mt65xx: fix NULL ptr dereference
  i2c: aspeed: fix master pending state handling
This commit is contained in:
Linus Torvalds 2019-10-26 15:06:58 -04:00
commit 992cb107e1
3 changed files with 48 additions and 29 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

54
drivers/i2c/busses/i2c-aspeed.c
View File

@ -108,6 +108,12 @@
#define ASPEED_I2CD_S_TX_CMD BIT(2)
#define ASPEED_I2CD_M_TX_CMD BIT(1)
#define ASPEED_I2CD_M_START_CMD BIT(0)
#define ASPEED_I2CD_MASTER_CMDS_MASK \
(ASPEED_I2CD_M_STOP_CMD | \
ASPEED_I2CD_M_S_RX_CMD_LAST | \
ASPEED_I2CD_M_RX_CMD | \
ASPEED_I2CD_M_TX_CMD | \
ASPEED_I2CD_M_START_CMD)
/* 0x18 : I2CD Slave Device Address Register */
#define ASPEED_I2CD_DEV_ADDR_MASK GENMASK(6, 0)
@ -336,18 +342,19 @@ static void aspeed_i2c_do_start(struct aspeed_i2c_bus *bus)
struct i2c_msg *msg = &bus->msgs[bus->msgs_index];
u8 slave_addr = i2c_8bit_addr_from_msg(msg);
bus->master_state = ASPEED_I2C_MASTER_START;
#if IS_ENABLED(CONFIG_I2C_SLAVE)
/*
* If it's requested in the middle of a slave session, set the master
* state to 'pending' then H/W will continue handling this master
* command when the bus comes back to the idle state.
*/
if (bus->slave_state != ASPEED_I2C_SLAVE_INACTIVE)
if (bus->slave_state != ASPEED_I2C_SLAVE_INACTIVE) {
bus->master_state = ASPEED_I2C_MASTER_PENDING;
return;
}
#endif /* CONFIG_I2C_SLAVE */
bus->master_state = ASPEED_I2C_MASTER_START;
bus->buf_index = 0;
if (msg->flags & I2C_M_RD) {
@ -422,20 +429,6 @@ static u32 aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus, u32 irq_status)
}
}
#if IS_ENABLED(CONFIG_I2C_SLAVE)
/*
* A pending master command will be started by H/W when the bus comes
* back to idle state after completing a slave operation so change the
* master state from 'pending' to 'start' at here if slave is inactive.
*/
if (bus->master_state == ASPEED_I2C_MASTER_PENDING) {
if (bus->slave_state != ASPEED_I2C_SLAVE_INACTIVE)
goto out_no_complete;
bus->master_state = ASPEED_I2C_MASTER_START;
}
#endif /* CONFIG_I2C_SLAVE */
/* Master is not currently active, irq was for someone else. */
if (bus->master_state == ASPEED_I2C_MASTER_INACTIVE ||
bus->master_state == ASPEED_I2C_MASTER_PENDING)
@ -462,11 +455,15 @@ static u32 aspeed_i2c_master_irq(struct aspeed_i2c_bus *bus, u32 irq_status)
#if IS_ENABLED(CONFIG_I2C_SLAVE)
/*
* If a peer master starts a xfer immediately after it queues a
* master command, change its state to 'pending' then H/W will
* continue the queued master xfer just after completing the
* slave mode session.
* master command, clear the queued master command and change
* its state to 'pending'. To simplify handling of pending
* cases, it uses S/W solution instead of H/W command queue
* handling.
*/
if (unlikely(irq_status & ASPEED_I2CD_INTR_SLAVE_MATCH)) {
writel(readl(bus->base + ASPEED_I2C_CMD_REG) &
~ASPEED_I2CD_MASTER_CMDS_MASK,
bus->base + ASPEED_I2C_CMD_REG);
bus->master_state = ASPEED_I2C_MASTER_PENDING;
dev_dbg(bus->dev,
"master goes pending due to a slave start\n");
@ -629,6 +626,14 @@ static irqreturn_t aspeed_i2c_bus_irq(int irq, void *dev_id)
irq_handled |= aspeed_i2c_master_irq(bus,
irq_remaining);
}
/*
* Start a pending master command at here if a slave operation is
* completed.
*/
if (bus->master_state == ASPEED_I2C_MASTER_PENDING &&
bus->slave_state == ASPEED_I2C_SLAVE_INACTIVE)
aspeed_i2c_do_start(bus);
#else
irq_handled = aspeed_i2c_master_irq(bus, irq_remaining);
#endif /* CONFIG_I2C_SLAVE */
@ -691,6 +696,15 @@ static int aspeed_i2c_master_xfer(struct i2c_adapter *adap,
ASPEED_I2CD_BUS_BUSY_STS))
aspeed_i2c_recover_bus(bus);
/*
* If timed out and the state is still pending, drop the pending
* master command.
*/
spin_lock_irqsave(&bus->lock, flags);
if (bus->master_state == ASPEED_I2C_MASTER_PENDING)
bus->master_state = ASPEED_I2C_MASTER_INACTIVE;
spin_unlock_irqrestore(&bus->lock, flags);
return -ETIMEDOUT;
}

2
drivers/i2c/busses/i2c-mt65xx.c
View File

@ -875,7 +875,7 @@ static irqreturn_t mtk_i2c_irq(int irqno, void *dev_id)
static u32 mtk_i2c_functionality(struct i2c_adapter *adap)
{
if (adap->quirks->flags & I2C_AQ_NO_ZERO_LEN)
if (i2c_check_quirks(adap, I2C_AQ_NO_ZERO_LEN))
return I2C_FUNC_I2C |
(I2C_FUNC_SMBUS_EMUL & ~I2C_FUNC_SMBUS_QUICK);
else

21
drivers/i2c/busses/i2c-stm32f7.c
View File

@ -305,7 +305,7 @@ struct stm32f7_i2c_dev {
struct regmap *regmap;
};
/**
/*
* All these values are coming from I2C Specification, Version 6.0, 4th of
* April 2014.
*
@ -1192,6 +1192,8 @@ static void stm32f7_i2c_slave_start(struct stm32f7_i2c_dev *i2c_dev)
STM32F7_I2C_CR1_TXIE;
stm32f7_i2c_set_bits(base + STM32F7_I2C_CR1, mask);
/* Write 1st data byte */
writel_relaxed(value, base + STM32F7_I2C_TXDR);
} else {
/* Notify i2c slave that new write transfer is starting */
i2c_slave_event(slave, I2C_SLAVE_WRITE_REQUESTED, &value);
@ -1501,7 +1503,7 @@ static irqreturn_t stm32f7_i2c_isr_error(int irq, void *data)
void __iomem *base = i2c_dev->base;
struct device *dev = i2c_dev->dev;
struct stm32_i2c_dma *dma = i2c_dev->dma;
u32 mask, status;
u32 status;
status = readl_relaxed(i2c_dev->base + STM32F7_I2C_ISR);
@ -1526,12 +1528,15 @@ static irqreturn_t stm32f7_i2c_isr_error(int irq, void *data)
f7_msg->result = -EINVAL;
}
/* Disable interrupts */
if (stm32f7_i2c_is_slave_registered(i2c_dev))
mask = STM32F7_I2C_XFER_IRQ_MASK;
else
mask = STM32F7_I2C_ALL_IRQ_MASK;
stm32f7_i2c_disable_irq(i2c_dev, mask);
if (!i2c_dev->slave_running) {
u32 mask;
/* Disable interrupts */
if (stm32f7_i2c_is_slave_registered(i2c_dev))
mask = STM32F7_I2C_XFER_IRQ_MASK;
else
mask = STM32F7_I2C_ALL_IRQ_MASK;
stm32f7_i2c_disable_irq(i2c_dev, mask);
}
/* Disable dma */
if (i2c_dev->use_dma) {