forked from luck/tmp_suning_uos_patched
parisc: fix serial ports on C8000 workstation
The C8000 workstation (64 bit kernel only) has a somewhat different serial port configuration than other models. Thomas Bogendoerfer sent a patch to fix this in September 2010, which was now minimally modified by me. Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de> Signed-off-by: Helge Deller <deller@gmx.de>
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@ -1205,6 +1205,7 @@ static struct hp_hardware hp_hardware_list[] = {
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{HPHW_FIO, 0x004, 0x00320, 0x0, "Metheus Frame Buffer"},
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{HPHW_FIO, 0x004, 0x00340, 0x0, "BARCO CX4500 VME Grphx Cnsl"},
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{HPHW_FIO, 0x004, 0x00360, 0x0, "Hughes TOG VME FDDI"},
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{HPHW_FIO, 0x076, 0x000AD, 0x00, "Crestone Peak RS-232"},
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{HPHW_IOA, 0x185, 0x0000B, 0x00, "Java BC Summit Port"},
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{HPHW_IOA, 0x1FF, 0x0000B, 0x00, "Hitachi Ghostview Summit Port"},
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{HPHW_IOA, 0x580, 0x0000B, 0x10, "U2-IOA BC Runway Port"},
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@ -811,6 +811,70 @@ int iosapic_fixup_irq(void *isi_obj, struct pci_dev *pcidev)
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return pcidev->irq;
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}
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static struct iosapic_info *first_isi = NULL;
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#ifdef CONFIG_64BIT
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int iosapic_serial_irq(int num)
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{
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struct iosapic_info *isi = first_isi;
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struct irt_entry *irte = NULL; /* only used if PAT PDC */
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struct vector_info *vi;
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int isi_line; /* line used by device */
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/* lookup IRT entry for isi/slot/pin set */
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irte = &irt_cell[num];
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DBG_IRT("iosapic_serial_irq(): irte %p %x %x %x %x %x %x %x %x\n",
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irte,
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irte->entry_type,
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irte->entry_length,
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irte->polarity_trigger,
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irte->src_bus_irq_devno,
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irte->src_bus_id,
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irte->src_seg_id,
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irte->dest_iosapic_intin,
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(u32) irte->dest_iosapic_addr);
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isi_line = irte->dest_iosapic_intin;
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/* get vector info for this input line */
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vi = isi->isi_vector + isi_line;
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DBG_IRT("iosapic_serial_irq: line %d vi 0x%p\n", isi_line, vi);
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/* If this IRQ line has already been setup, skip it */
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if (vi->irte)
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goto out;
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vi->irte = irte;
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/*
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* Allocate processor IRQ
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*
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* XXX/FIXME The txn_alloc_irq() code and related code should be
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* moved to enable_irq(). That way we only allocate processor IRQ
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* bits for devices that actually have drivers claiming them.
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* Right now we assign an IRQ to every PCI device present,
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* regardless of whether it's used or not.
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*/
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vi->txn_irq = txn_alloc_irq(8);
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if (vi->txn_irq < 0)
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panic("I/O sapic: couldn't get TXN IRQ\n");
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/* enable_irq() will use txn_* to program IRdT */
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vi->txn_addr = txn_alloc_addr(vi->txn_irq);
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vi->txn_data = txn_alloc_data(vi->txn_irq);
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vi->eoi_addr = isi->addr + IOSAPIC_REG_EOI;
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vi->eoi_data = cpu_to_le32(vi->txn_data);
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cpu_claim_irq(vi->txn_irq, &iosapic_interrupt_type, vi);
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out:
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return vi->txn_irq;
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}
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#endif
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/*
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** squirrel away the I/O Sapic Version
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@ -877,6 +941,8 @@ void *iosapic_register(unsigned long hpa)
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vip->irqline = (unsigned char) cnt;
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vip->iosapic = isi;
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}
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if (!first_isi)
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first_isi = isi;
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return isi;
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}
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@ -30,6 +30,12 @@ static int __init serial_init_chip(struct parisc_device *dev)
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unsigned long address;
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int err;
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#ifdef CONFIG_64BIT
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extern int iosapic_serial_irq(int cellnum);
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if (!dev->irq && (dev->id.sversion == 0xad))
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dev->irq = iosapic_serial_irq(dev->mod_index-1);
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#endif
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if (!dev->irq) {
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/* We find some unattached serial ports by walking native
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* busses. These should be silently ignored. Otherwise,
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@ -51,7 +57,8 @@ static int __init serial_init_chip(struct parisc_device *dev)
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memset(&uart, 0, sizeof(uart));
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uart.port.iotype = UPIO_MEM;
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/* 7.272727MHz on Lasi. Assumed the same for Dino, Wax and Timi. */
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uart.port.uartclk = 7272727;
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uart.port.uartclk = (dev->id.sversion != 0xad) ?
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7272727 : 1843200;
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uart.port.mapbase = address;
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uart.port.membase = ioremap_nocache(address, 16);
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uart.port.irq = dev->irq;
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@ -73,6 +80,7 @@ static struct parisc_device_id serial_tbl[] = {
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{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x00075 },
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{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x0008c },
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{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x0008d },
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{ HPHW_FIO, HVERSION_REV_ANY_ID, HVERSION_ANY_ID, 0x000ad },
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{ 0 }
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};
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