forked from luck/tmp_suning_uos_patched
drm/radeon: take exclusive_lock in read mode during ring tests, v5
This is needed for the next commit, because the lockup detection will need the read lock to run. v4 (chk): split out forced fence completion, remove unrelated changes, add and handle in_reset flag v5 (agd5f): rebase fix Signed-off-by: Maarten Lankhorst <maarten.lankhorst@canonical.com> Signed-off-by: Christian König <christian.koenig@amd.com> Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
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@ -2326,7 +2326,7 @@ struct radeon_device {
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bool need_dma32;
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bool accel_working;
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bool fastfb_working; /* IGP feature*/
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bool needs_reset;
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bool needs_reset, in_reset;
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struct radeon_surface_reg surface_regs[RADEON_GEM_MAX_SURFACES];
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const struct firmware *me_fw; /* all family ME firmware */
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const struct firmware *pfp_fw; /* r6/700 PFP firmware */
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@ -653,6 +653,13 @@ int radeon_cs_ioctl(struct drm_device *dev, void *data, struct drm_file *filp)
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up_read(&rdev->exclusive_lock);
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return -EBUSY;
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}
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if (rdev->in_reset) {
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up_read(&rdev->exclusive_lock);
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r = radeon_gpu_reset(rdev);
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if (!r)
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r = -EAGAIN;
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return r;
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}
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/* initialize parser */
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memset(&parser, 0, sizeof(struct radeon_cs_parser));
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parser.filp = filp;
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@ -1673,6 +1673,7 @@ int radeon_gpu_reset(struct radeon_device *rdev)
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return 0;
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}
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rdev->in_reset = true;
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rdev->needs_reset = false;
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radeon_save_bios_scratch_regs(rdev);
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@ -1691,7 +1692,6 @@ int radeon_gpu_reset(struct radeon_device *rdev)
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}
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}
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retry:
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r = radeon_asic_reset(rdev);
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if (!r) {
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dev_info(rdev->dev, "GPU reset succeeded, trying to resume\n");
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@ -1700,25 +1700,11 @@ int radeon_gpu_reset(struct radeon_device *rdev)
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radeon_restore_bios_scratch_regs(rdev);
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if (!r) {
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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if (!r && ring_data[i]) {
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radeon_ring_restore(rdev, &rdev->ring[i],
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ring_sizes[i], ring_data[i]);
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ring_sizes[i] = 0;
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ring_data[i] = NULL;
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}
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r = radeon_ib_ring_tests(rdev);
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if (r) {
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dev_err(rdev->dev, "ib ring test failed (%d).\n", r);
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if (saved) {
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saved = false;
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radeon_suspend(rdev);
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goto retry;
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}
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}
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} else {
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for (i = 0; i < RADEON_NUM_RINGS; ++i) {
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} else {
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radeon_fence_driver_force_completion(rdev, i);
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kfree(ring_data[i]);
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}
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@ -1751,19 +1737,28 @@ int radeon_gpu_reset(struct radeon_device *rdev)
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/* reset hpd state */
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radeon_hpd_init(rdev);
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ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched);
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downgrade_write(&rdev->exclusive_lock);
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drm_helper_resume_force_mode(rdev->ddev);
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/* set the power state here in case we are a PX system or headless */
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if ((rdev->pm.pm_method == PM_METHOD_DPM) && rdev->pm.dpm_enabled)
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radeon_pm_compute_clocks(rdev);
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ttm_bo_unlock_delayed_workqueue(&rdev->mman.bdev, resched);
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if (r) {
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if (!r) {
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r = radeon_ib_ring_tests(rdev);
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if (r && saved)
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r = -EAGAIN;
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} else {
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/* bad news, how to tell it to userspace ? */
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dev_info(rdev->dev, "GPU reset failed\n");
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}
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up_write(&rdev->exclusive_lock);
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rdev->needs_reset = r == -EAGAIN;
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rdev->in_reset = false;
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up_read(&rdev->exclusive_lock);
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return r;
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}
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@ -405,7 +405,9 @@ static void radeon_flip_work_func(struct work_struct *__work)
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r = radeon_fence_wait(work->fence, false);
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if (r == -EDEADLK) {
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up_read(&rdev->exclusive_lock);
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r = radeon_gpu_reset(rdev);
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do {
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r = radeon_gpu_reset(rdev);
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} while (r == -EAGAIN);
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down_read(&rdev->exclusive_lock);
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}
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if (r)
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