forked from luck/tmp_suning_uos_patched
mfd: cros_ec: spi: Increase cros_ec_spi deadline from 5ms to 100ms
We're adding i2c tunneling to the list of things that goes over cros_ec. i2c tunneling can be slooooooow, so increase our deadline to 100ms to account for that. Signed-off-by: Doug Anderson <dianders@chromium.org> Reviewed-by: Simon Glass <sjg@chromium.org> Tested-by: Andrew Bresticker <abrestic@chromium.org> Tested-by: Stephen Warren <swarren@nvidia.com> Signed-off-by: Lee Jones <lee.jones@linaro.org>
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@ -39,14 +39,22 @@
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#define EC_MSG_PREAMBLE_COUNT 32
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/*
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* We must get a response from the EC in 5ms. This is a very long
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* time, but the flash write command can take 2-3ms. The EC command
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* processing is currently not very fast (about 500us). We could
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* look at speeding this up and making the flash write command a
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* 'slow' command, requiring a GET_STATUS wait loop, like flash
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* erase.
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*/
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#define EC_MSG_DEADLINE_MS 5
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* Allow for a long time for the EC to respond. We support i2c
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* tunneling and support fairly long messages for the tunnel (249
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* bytes long at the moment). If we're talking to a 100 kHz device
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* on the other end and need to transfer ~256 bytes, then we need:
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* 10 us/bit * ~10 bits/byte * ~256 bytes = ~25ms
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*
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* We'll wait 4 times that to handle clock stretching and other
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* paranoia.
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*
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* It's pretty unlikely that we'll really see a 249 byte tunnel in
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* anything other than testing. If this was more common we might
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* consider having slow commands like this require a GET_STATUS
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* wait loop. The 'flash write' command would be another candidate
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* for this, clocking in at 2-3ms.
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*/
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#define EC_MSG_DEADLINE_MS 100
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/*
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* Time between raising the SPI chip select (for the end of a
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