From 9c857a8e89035583ad4a9e2f160cc760012070c8 Mon Sep 17 00:00:00 2001 From: Peter Ujfalusi Date: Mon, 3 Aug 2020 13:07:24 +0300 Subject: [PATCH] dmaengine: ti: k3-psil-j721e: Add entries for 2nd port of MCU SA2UL The security accelerator within MCU domain supports two ports similarly to the SA2UL in MAIN domain. Add endpoint configuration for the two ingress and one egress threads of the second port. Signed-off-by: Peter Ujfalusi Link: https://lore.kernel.org/r/20200803100724.19003-1-peter.ujfalusi@ti.com Signed-off-by: Vinod Koul --- drivers/dma/ti/k3-psil-j721e.c | 3 +++ 1 file changed, 3 insertions(+) diff --git a/drivers/dma/ti/k3-psil-j721e.c b/drivers/dma/ti/k3-psil-j721e.c index e3cfd5f66842..7580870ed746 100644 --- a/drivers/dma/ti/k3-psil-j721e.c +++ b/drivers/dma/ti/k3-psil-j721e.c @@ -166,6 +166,8 @@ static struct psil_ep j721e_src_ep_map[] = { /* SA2UL */ PSIL_SA2UL(0x7500, 0), PSIL_SA2UL(0x7501, 0), + PSIL_SA2UL(0x7502, 0), + PSIL_SA2UL(0x7503, 0), }; /* PSI-L destination thread IDs, used for TX (DMA_MEM_TO_DEV) */ @@ -211,6 +213,7 @@ static struct psil_ep j721e_dst_ep_map[] = { PSIL_ETHERNET(0xf007), /* SA2UL */ PSIL_SA2UL(0xf500, 1), + PSIL_SA2UL(0xf501, 1), }; struct psil_ep_map j721e_ep_map = {