forked from luck/tmp_suning_uos_patched
ARM: S5P6440: Tidy register and disable clock usage
This patch changes the clock registration code to use the s3c_register_clocks() followed by s3c_disable_clocks() instead of the loops it was using. Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
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@ -133,7 +133,7 @@ static struct clksrc_clk clk_pclk_low = {
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* recommended to keep the following clocks disabled until the driver requests
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* for enabling the clock.
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*/
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static struct clk init_clocks_disable[] = {
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static struct clk init_clocks_off[] = {
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{
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.name = "nand",
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.id = -1,
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@ -602,8 +602,6 @@ static struct clk *clks[] __initdata = {
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void __init s5p6440_register_clocks(void)
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{
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struct clk *clkp;
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int ret;
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int ptr;
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s3c24xx_register_clocks(clks, ARRAY_SIZE(clks));
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@ -614,16 +612,8 @@ void __init s5p6440_register_clocks(void)
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s3c_register_clksrc(clksrcs, ARRAY_SIZE(clksrcs));
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s3c_register_clocks(init_clocks, ARRAY_SIZE(init_clocks));
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clkp = init_clocks_disable;
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for (ptr = 0; ptr < ARRAY_SIZE(init_clocks_disable); ptr++, clkp++) {
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ret = s3c24xx_register_clock(clkp);
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if (ret < 0) {
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printk(KERN_ERR "Failed to register clock %s (%d)\n",
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clkp->name, ret);
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}
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(clkp->enable)(clkp, 0);
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}
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s3c_register_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_disable_clocks(init_clocks_off, ARRAY_SIZE(init_clocks_off));
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s3c_pwmclk_init();
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}
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