ARM: dts: meson: fix the memory region of the GPIO interrupt controller

commit 200a575b68 ("ARM: dts: meson: organize devices in their corresponding busses")
organized all peripherals in busses so that the base register offset of
the bus doesn't have to be included in all child-nodes anymore.
The GPIO interrupt controller however specifies the register offset
without subtracting the "cbus" base address. This leads to a problem
where of_iomap inside the irq-meson-gpio driver fails because it
actually tries to map 0x182209880 (cbus base = 0xc1100000 + 0xc1109880
for the GPIO interrupt controller). Fix this by using 0x9880 as register
offset.

Fixes: 7d32bc03bc ("ARM: dts: meson8b: enable gpio interrupt controller")
Signed-off-by: Martin Blumenstingl <martin.blumenstingl@googlemail.com>
Acked-by: Jerome Brunet <jbrunet@baylibre.com>
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
This commit is contained in:
Martin Blumenstingl 2017-10-30 00:17:15 +01:00 committed by Kevin Hilman
parent 208e4ea614
commit 9fd7a2e063

View File

@ -184,7 +184,7 @@ spifc: spi@8c80 {
gpio_intc: interrupt-controller@9880 {
compatible = "amlogic,meson-gpio-intc";
reg = <0xc1109880 0x10>;
reg = <0x9880 0x10>;
interrupt-controller;
#interrupt-cells = <2>;
amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;