forked from luck/tmp_suning_uos_patched
ACPI: delete CPU_IDLE=n code
CPU_IDLE=y has been default for ACPI=y since Nov-2007, and has shipped in many distributions since then. Here we delete the CPU_IDLE=n ACPI idle code, since nobody should be using it, and we don't want to maintain two versions. Signed-off-by: Len Brown <len.brown@intel.com>
This commit is contained in:
Len Brown
parent
31878dd86b
commit
9fdd54f206
@ -9,6 +9,7 @@ menuconfig ACPI
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depends on PCI
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depends on PM
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select PNP
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select CPU_IDLE
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default y
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---help---
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Advanced Configuration and Power Interface (ACPI) support for
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@ -66,43 +66,17 @@ ACPI_MODULE_NAME("processor_idle");
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#define ACPI_PROCESSOR_FILE_POWER "power"
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#define US_TO_PM_TIMER_TICKS(t) ((t * (PM_TIMER_FREQUENCY/1000)) / 1000)
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#define PM_TIMER_TICK_NS (1000000000ULL/PM_TIMER_FREQUENCY)
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#ifndef CONFIG_CPU_IDLE
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#define C2_OVERHEAD 4 /* 1us (3.579 ticks per us) */
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#define C3_OVERHEAD 4 /* 1us (3.579 ticks per us) */
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static void (*pm_idle_save) (void) __read_mostly;
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#else
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#define C2_OVERHEAD 1 /* 1us */
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#define C3_OVERHEAD 1 /* 1us */
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#endif
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#define PM_TIMER_TICKS_TO_US(p) (((p) * 1000)/(PM_TIMER_FREQUENCY/1000))
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static unsigned int max_cstate __read_mostly = ACPI_PROCESSOR_MAX_POWER;
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#ifdef CONFIG_CPU_IDLE
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module_param(max_cstate, uint, 0000);
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#else
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module_param(max_cstate, uint, 0644);
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#endif
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static unsigned int nocst __read_mostly;
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module_param(nocst, uint, 0000);
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#ifndef CONFIG_CPU_IDLE
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/*
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* bm_history -- bit-mask with a bit per jiffy of bus-master activity
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* 1000 HZ: 0xFFFFFFFF: 32 jiffies = 32ms
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* 800 HZ: 0xFFFFFFFF: 32 jiffies = 40ms
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* 100 HZ: 0x0000000F: 4 jiffies = 40ms
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* reduce history for more aggressive entry into C3
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*/
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static unsigned int bm_history __read_mostly =
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(HZ >= 800 ? 0xFFFFFFFF : ((1U << (HZ / 25)) - 1));
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module_param(bm_history, uint, 0644);
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static int acpi_processor_set_power_policy(struct acpi_processor *pr);
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#else /* CONFIG_CPU_IDLE */
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static unsigned int latency_factor __read_mostly = 2;
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module_param(latency_factor, uint, 0644);
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#endif
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/*
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* IBM ThinkPad R40e crashes mysteriously when going into C2 or C3.
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@ -224,51 +198,6 @@ static void acpi_safe_halt(void)
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current_thread_info()->status |= TS_POLLING;
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}
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#ifndef CONFIG_CPU_IDLE
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static void
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acpi_processor_power_activate(struct acpi_processor *pr,
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struct acpi_processor_cx *new)
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{
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struct acpi_processor_cx *old;
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if (!pr || !new)
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return;
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old = pr->power.state;
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if (old)
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old->promotion.count = 0;
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new->demotion.count = 0;
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pr->power.state = new;
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return;
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}
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static atomic_t c3_cpu_count;
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/* Common C-state entry for C2, C3, .. */
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static void acpi_cstate_enter(struct acpi_processor_cx *cstate)
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{
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/* Don't trace irqs off for idle */
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stop_critical_timings();
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if (cstate->entry_method == ACPI_CSTATE_FFH) {
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/* Call into architectural FFH based C-state */
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acpi_processor_ffh_cstate_enter(cstate);
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} else {
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int unused;
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/* IO port based C-state */
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inb(cstate->address);
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/* Dummy wait op - must do something useless after P_LVL2 read
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because chipsets cannot guarantee that STPCLK# signal
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gets asserted in time to freeze execution properly. */
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unused = inl(acpi_gbl_FADT.xpm_timer_block.address);
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}
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start_critical_timings();
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}
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#endif /* !CONFIG_CPU_IDLE */
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#ifdef ARCH_APICTIMER_STOPS_ON_C3
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/*
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@ -370,421 +299,6 @@ static int tsc_halts_in_c(int state)
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}
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#endif
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#ifndef CONFIG_CPU_IDLE
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static void acpi_processor_idle(void)
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{
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struct acpi_processor *pr = NULL;
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struct acpi_processor_cx *cx = NULL;
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struct acpi_processor_cx *next_state = NULL;
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int sleep_ticks = 0;
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u32 t1, t2 = 0;
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/*
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* Interrupts must be disabled during bus mastering calculations and
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* for C2/C3 transitions.
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*/
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local_irq_disable();
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pr = __get_cpu_var(processors);
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if (!pr) {
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local_irq_enable();
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return;
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}
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/*
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* Check whether we truly need to go idle, or should
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* reschedule:
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*/
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if (unlikely(need_resched())) {
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local_irq_enable();
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return;
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}
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cx = pr->power.state;
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if (!cx || acpi_idle_suspend) {
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if (pm_idle_save) {
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pm_idle_save(); /* enables IRQs */
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} else {
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acpi_safe_halt();
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local_irq_enable();
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}
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return;
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}
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/*
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* Check BM Activity
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* -----------------
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* Check for bus mastering activity (if required), record, and check
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* for demotion.
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*/
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if (pr->flags.bm_check) {
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u32 bm_status = 0;
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unsigned long diff = jiffies - pr->power.bm_check_timestamp;
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if (diff > 31)
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diff = 31;
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pr->power.bm_activity <<= diff;
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acpi_get_register_unlocked(ACPI_BITREG_BUS_MASTER_STATUS, &bm_status);
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if (bm_status) {
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pr->power.bm_activity |= 0x1;
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acpi_set_register(ACPI_BITREG_BUS_MASTER_STATUS, 1);
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}
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/*
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* PIIX4 Erratum #18: Note that BM_STS doesn't always reflect
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* the true state of bus mastering activity; forcing us to
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* manually check the BMIDEA bit of each IDE channel.
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*/
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else if (errata.piix4.bmisx) {
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if ((inb_p(errata.piix4.bmisx + 0x02) & 0x01)
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|| (inb_p(errata.piix4.bmisx + 0x0A) & 0x01))
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pr->power.bm_activity |= 0x1;
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}
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pr->power.bm_check_timestamp = jiffies;
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/*
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* If bus mastering is or was active this jiffy, demote
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* to avoid a faulty transition. Note that the processor
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* won't enter a low-power state during this call (to this
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* function) but should upon the next.
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*
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* TBD: A better policy might be to fallback to the demotion
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* state (use it for this quantum only) istead of
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* demoting -- and rely on duration as our sole demotion
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* qualification. This may, however, introduce DMA
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* issues (e.g. floppy DMA transfer overrun/underrun).
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*/
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if ((pr->power.bm_activity & 0x1) &&
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cx->demotion.threshold.bm) {
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local_irq_enable();
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next_state = cx->demotion.state;
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goto end;
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}
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}
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#ifdef CONFIG_HOTPLUG_CPU
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/*
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* Check for P_LVL2_UP flag before entering C2 and above on
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* an SMP system. We do it here instead of doing it at _CST/P_LVL
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* detection phase, to work cleanly with logical CPU hotplug.
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*/
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if ((cx->type != ACPI_STATE_C1) && (num_online_cpus() > 1) &&
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!pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED))
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cx = &pr->power.states[ACPI_STATE_C1];
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#endif
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/*
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* Sleep:
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* ------
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* Invoke the current Cx state to put the processor to sleep.
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*/
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if (cx->type == ACPI_STATE_C2 || cx->type == ACPI_STATE_C3) {
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current_thread_info()->status &= ~TS_POLLING;
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/*
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* TS_POLLING-cleared state must be visible before we
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* test NEED_RESCHED:
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*/
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smp_mb();
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if (need_resched()) {
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current_thread_info()->status |= TS_POLLING;
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local_irq_enable();
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return;
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}
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}
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switch (cx->type) {
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case ACPI_STATE_C1:
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/*
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* Invoke C1.
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* Use the appropriate idle routine, the one that would
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* be used without acpi C-states.
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*/
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if (pm_idle_save) {
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pm_idle_save(); /* enables IRQs */
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} else {
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acpi_safe_halt();
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local_irq_enable();
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}
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/*
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* TBD: Can't get time duration while in C1, as resumes
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* go to an ISR rather than here. Need to instrument
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* base interrupt handler.
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*
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* Note: the TSC better not stop in C1, sched_clock() will
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* skew otherwise.
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*/
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sleep_ticks = 0xFFFFFFFF;
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break;
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case ACPI_STATE_C2:
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/* Get start time (ticks) */
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t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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/* Tell the scheduler that we are going deep-idle: */
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sched_clock_idle_sleep_event();
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/* Invoke C2 */
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acpi_state_timer_broadcast(pr, cx, 1);
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acpi_cstate_enter(cx);
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/* Get end time (ticks) */
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t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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#if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
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/* TSC halts in C2, so notify users */
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if (tsc_halts_in_c(ACPI_STATE_C2))
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mark_tsc_unstable("possible TSC halt in C2");
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#endif
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/* Compute time (ticks) that we were actually asleep */
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sleep_ticks = ticks_elapsed(t1, t2);
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/* Tell the scheduler how much we idled: */
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sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
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/* Re-enable interrupts */
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local_irq_enable();
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/* Do not account our idle-switching overhead: */
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sleep_ticks -= cx->latency_ticks + C2_OVERHEAD;
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current_thread_info()->status |= TS_POLLING;
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acpi_state_timer_broadcast(pr, cx, 0);
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break;
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case ACPI_STATE_C3:
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acpi_unlazy_tlb(smp_processor_id());
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/*
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* Must be done before busmaster disable as we might
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* need to access HPET !
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*/
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acpi_state_timer_broadcast(pr, cx, 1);
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/*
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* disable bus master
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* bm_check implies we need ARB_DIS
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* !bm_check implies we need cache flush
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* bm_control implies whether we can do ARB_DIS
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*
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* That leaves a case where bm_check is set and bm_control is
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* not set. In that case we cannot do much, we enter C3
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* without doing anything.
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*/
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if (pr->flags.bm_check && pr->flags.bm_control) {
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if (atomic_inc_return(&c3_cpu_count) ==
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num_online_cpus()) {
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/*
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* All CPUs are trying to go to C3
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* Disable bus master arbitration
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*/
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acpi_set_register(ACPI_BITREG_ARB_DISABLE, 1);
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}
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} else if (!pr->flags.bm_check) {
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/* SMP with no shared cache... Invalidate cache */
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ACPI_FLUSH_CPU_CACHE();
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}
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/* Get start time (ticks) */
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t1 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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/* Invoke C3 */
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/* Tell the scheduler that we are going deep-idle: */
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sched_clock_idle_sleep_event();
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acpi_cstate_enter(cx);
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/* Get end time (ticks) */
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t2 = inl(acpi_gbl_FADT.xpm_timer_block.address);
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if (pr->flags.bm_check && pr->flags.bm_control) {
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/* Enable bus master arbitration */
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atomic_dec(&c3_cpu_count);
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acpi_set_register(ACPI_BITREG_ARB_DISABLE, 0);
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}
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#if defined (CONFIG_GENERIC_TIME) && defined (CONFIG_X86)
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/* TSC halts in C3, so notify users */
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if (tsc_halts_in_c(ACPI_STATE_C3))
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mark_tsc_unstable("TSC halts in C3");
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#endif
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/* Compute time (ticks) that we were actually asleep */
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sleep_ticks = ticks_elapsed(t1, t2);
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/* Tell the scheduler how much we idled: */
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sched_clock_idle_wakeup_event(sleep_ticks*PM_TIMER_TICK_NS);
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/* Re-enable interrupts */
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local_irq_enable();
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/* Do not account our idle-switching overhead: */
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sleep_ticks -= cx->latency_ticks + C3_OVERHEAD;
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current_thread_info()->status |= TS_POLLING;
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acpi_state_timer_broadcast(pr, cx, 0);
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break;
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default:
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local_irq_enable();
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return;
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}
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cx->usage++;
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if ((cx->type != ACPI_STATE_C1) && (sleep_ticks > 0))
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cx->time += sleep_ticks;
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next_state = pr->power.state;
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#ifdef CONFIG_HOTPLUG_CPU
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/* Don't do promotion/demotion */
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if ((cx->type == ACPI_STATE_C1) && (num_online_cpus() > 1) &&
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!pr->flags.has_cst && !(acpi_gbl_FADT.flags & ACPI_FADT_C2_MP_SUPPORTED)) {
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next_state = cx;
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goto end;
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}
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#endif
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/*
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* Promotion?
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* ----------
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* Track the number of longs (time asleep is greater than threshold)
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* and promote when the count threshold is reached. Note that bus
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* mastering activity may prevent promotions.
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* Do not promote above max_cstate.
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*/
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if (cx->promotion.state &&
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((cx->promotion.state - pr->power.states) <= max_cstate)) {
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if (sleep_ticks > cx->promotion.threshold.ticks &&
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cx->promotion.state->latency <=
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pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
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cx->promotion.count++;
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cx->demotion.count = 0;
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if (cx->promotion.count >=
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cx->promotion.threshold.count) {
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if (pr->flags.bm_check) {
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if (!
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(pr->power.bm_activity & cx->
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promotion.threshold.bm)) {
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next_state =
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cx->promotion.state;
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goto end;
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}
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} else {
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next_state = cx->promotion.state;
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goto end;
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}
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}
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}
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}
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/*
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* Demotion?
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* ---------
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* Track the number of shorts (time asleep is less than time threshold)
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* and demote when the usage threshold is reached.
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*/
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if (cx->demotion.state) {
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if (sleep_ticks < cx->demotion.threshold.ticks) {
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cx->demotion.count++;
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cx->promotion.count = 0;
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if (cx->demotion.count >= cx->demotion.threshold.count) {
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next_state = cx->demotion.state;
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goto end;
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}
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}
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}
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end:
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/*
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* Demote if current state exceeds max_cstate
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* or if the latency of the current state is unacceptable
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*/
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if ((pr->power.state - pr->power.states) > max_cstate ||
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pr->power.state->latency >
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pm_qos_requirement(PM_QOS_CPU_DMA_LATENCY)) {
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if (cx->demotion.state)
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next_state = cx->demotion.state;
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}
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/*
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* New Cx State?
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* -------------
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* If we're going to start using a new Cx state we must clean up
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* from the previous and prepare to use the new.
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*/
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if (next_state != pr->power.state)
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acpi_processor_power_activate(pr, next_state);
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}
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static int acpi_processor_set_power_policy(struct acpi_processor *pr)
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{
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unsigned int i;
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unsigned int state_is_set = 0;
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struct acpi_processor_cx *lower = NULL;
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struct acpi_processor_cx *higher = NULL;
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struct acpi_processor_cx *cx;
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if (!pr)
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return -EINVAL;
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/*
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* This function sets the default Cx state policy (OS idle handler).
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* Our scheme is to promote quickly to C2 but more conservatively
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* to C3. We're favoring C2 for its characteristics of low latency
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* (quick response), good power savings, and ability to allow bus
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* mastering activity. Note that the Cx state policy is completely
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* customizable and can be altered dynamically.
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*/
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||||
/* startup state */
|
||||
for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
|
||||
cx = &pr->power.states[i];
|
||||
if (!cx->valid)
|
||||
continue;
|
||||
|
||||
if (!state_is_set)
|
||||
pr->power.state = cx;
|
||||
state_is_set++;
|
||||
break;
|
||||
}
|
||||
|
||||
if (!state_is_set)
|
||||
return -ENODEV;
|
||||
|
||||
/* demotion */
|
||||
for (i = 1; i < ACPI_PROCESSOR_MAX_POWER; i++) {
|
||||
cx = &pr->power.states[i];
|
||||
if (!cx->valid)
|
||||
continue;
|
||||
|
||||
if (lower) {
|
||||
cx->demotion.state = lower;
|
||||
cx->demotion.threshold.ticks = cx->latency_ticks;
|
||||
cx->demotion.threshold.count = 1;
|
||||
if (cx->type == ACPI_STATE_C3)
|
||||
cx->demotion.threshold.bm = bm_history;
|
||||
}
|
||||
|
||||
lower = cx;
|
||||
}
|
||||
|
||||
/* promotion */
|
||||
for (i = (ACPI_PROCESSOR_MAX_POWER - 1); i > 0; i--) {
|
||||
cx = &pr->power.states[i];
|
||||
if (!cx->valid)
|
||||
continue;
|
||||
|
||||
if (higher) {
|
||||
cx->promotion.state = higher;
|
||||
cx->promotion.threshold.ticks = cx->latency_ticks;
|
||||
if (cx->type >= ACPI_STATE_C2)
|
||||
cx->promotion.threshold.count = 4;
|
||||
else
|
||||
cx->promotion.threshold.count = 10;
|
||||
if (higher->type == ACPI_STATE_C3)
|
||||
cx->promotion.threshold.bm = bm_history;
|
||||
}
|
||||
|
||||
higher = cx;
|
||||
}
|
||||
|
||||
return 0;
|
||||
}
|
||||
#endif /* !CONFIG_CPU_IDLE */
|
||||
|
||||
static int acpi_processor_get_power_info_fadt(struct acpi_processor *pr)
|
||||
{
|
||||
|
||||
@ -1027,11 +541,7 @@ static void acpi_processor_power_verify_c2(struct acpi_processor_cx *cx)
|
||||
*/
|
||||
cx->valid = 1;
|
||||
|
||||
#ifndef CONFIG_CPU_IDLE
|
||||
cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
|
||||
#else
|
||||
cx->latency_ticks = cx->latency;
|
||||
#endif
|
||||
|
||||
return;
|
||||
}
|
||||
@ -1111,11 +621,7 @@ static void acpi_processor_power_verify_c3(struct acpi_processor *pr,
|
||||
*/
|
||||
cx->valid = 1;
|
||||
|
||||
#ifndef CONFIG_CPU_IDLE
|
||||
cx->latency_ticks = US_TO_PM_TIMER_TICKS(cx->latency);
|
||||
#else
|
||||
cx->latency_ticks = cx->latency;
|
||||
#endif
|
||||
/*
|
||||
* On older chipsets, BM_RLD needs to be set
|
||||
* in order for Bus Master activity to wake the
|
||||
@ -1189,20 +695,6 @@ static int acpi_processor_get_power_info(struct acpi_processor *pr)
|
||||
|
||||
pr->power.count = acpi_processor_power_verify(pr);
|
||||
|
||||
#ifndef CONFIG_CPU_IDLE
|
||||
/*
|
||||
* Set Default Policy
|
||||
* ------------------
|
||||
* Now that we know which states are supported, set the default
|
||||
* policy. Note that this policy can be changed dynamically
|
||||
* (e.g. encourage deeper sleeps to conserve battery life when
|
||||
* not on AC).
|
||||
*/
|
||||
result = acpi_processor_set_power_policy(pr);
|
||||
if (result)
|
||||
return result;
|
||||
#endif
|
||||
|
||||
/*
|
||||
* if one state of type C2 or C3 is available, mark this
|
||||
* CPU as being "idle manageable"
|
||||
@ -1300,69 +792,6 @@ static const struct file_operations acpi_processor_power_fops = {
|
||||
.release = single_release,
|
||||
};
|
||||
|
||||
#ifndef CONFIG_CPU_IDLE
|
||||
|
||||
int acpi_processor_cst_has_changed(struct acpi_processor *pr)
|
||||
{
|
||||
int result = 0;
|
||||
|
||||
if (boot_option_idle_override)
|
||||
return 0;
|
||||
|
||||
if (!pr)
|
||||
return -EINVAL;
|
||||
|
||||
if (nocst) {
|
||||
return -ENODEV;
|
||||
}
|
||||
|
||||
if (!pr->flags.power_setup_done)
|
||||
return -ENODEV;
|
||||
|
||||
/*
|
||||
* Fall back to the default idle loop, when pm_idle_save had
|
||||
* been initialized.
|
||||
*/
|
||||
if (pm_idle_save) {
|
||||
pm_idle = pm_idle_save;
|
||||
/* Relies on interrupts forcing exit from idle. */
|
||||
synchronize_sched();
|
||||
}
|
||||
|
||||
pr->flags.power = 0;
|
||||
result = acpi_processor_get_power_info(pr);
|
||||
if ((pr->flags.power == 1) && (pr->flags.power_setup_done))
|
||||
pm_idle = acpi_processor_idle;
|
||||
|
||||
return result;
|
||||
}
|
||||
|
||||
#ifdef CONFIG_SMP
|
||||
static void smp_callback(void *v)
|
||||
{
|
||||
/* we already woke the CPU up, nothing more to do */
|
||||
}
|
||||
|
||||
/*
|
||||
* This function gets called when a part of the kernel has a new latency
|
||||
* requirement. This means we need to get all processors out of their C-state,
|
||||
* and then recalculate a new suitable C-state. Just do a cross-cpu IPI; that
|
||||
* wakes them all right up.
|
||||
*/
|
||||
static int acpi_processor_latency_notify(struct notifier_block *b,
|
||||
unsigned long l, void *v)
|
||||
{
|
||||
smp_call_function(smp_callback, NULL, 1);
|
||||
return NOTIFY_OK;
|
||||
}
|
||||
|
||||
static struct notifier_block acpi_processor_latency_notifier = {
|
||||
.notifier_call = acpi_processor_latency_notify,
|
||||
};
|
||||
|
||||
#endif
|
||||
|
||||
#else /* CONFIG_CPU_IDLE */
|
||||
|
||||
/**
|
||||
* acpi_idle_bm_check - checks if bus master activity was detected
|
||||
@ -1756,8 +1185,6 @@ int acpi_processor_cst_has_changed(struct acpi_processor *pr)
|
||||
return ret;
|
||||
}
|
||||
|
||||
#endif /* CONFIG_CPU_IDLE */
|
||||
|
||||
int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
|
||||
struct acpi_device *device)
|
||||
{
|
||||
@ -1786,10 +1213,6 @@ int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
|
||||
"ACPI: processor limited to max C-state %d\n",
|
||||
max_cstate);
|
||||
first_run++;
|
||||
#if !defined(CONFIG_CPU_IDLE) && defined(CONFIG_SMP)
|
||||
pm_qos_add_notifier(PM_QOS_CPU_DMA_LATENCY,
|
||||
&acpi_processor_latency_notifier);
|
||||
#endif
|
||||
}
|
||||
|
||||
if (!pr)
|
||||
@ -1813,11 +1236,9 @@ int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
|
||||
* platforms that only support C1.
|
||||
*/
|
||||
if (pr->flags.power) {
|
||||
#ifdef CONFIG_CPU_IDLE
|
||||
acpi_processor_setup_cpuidle(pr);
|
||||
if (cpuidle_register_device(&pr->power.dev))
|
||||
return -EIO;
|
||||
#endif
|
||||
|
||||
printk(KERN_INFO PREFIX "CPU%d (power states:", pr->id);
|
||||
for (i = 1; i <= pr->power.count; i++)
|
||||
@ -1825,13 +1246,6 @@ int __cpuinit acpi_processor_power_init(struct acpi_processor *pr,
|
||||
printk(" C%d[C%d]", i,
|
||||
pr->power.states[i].type);
|
||||
printk(")\n");
|
||||
|
||||
#ifndef CONFIG_CPU_IDLE
|
||||
if (pr->id == 0) {
|
||||
pm_idle_save = pm_idle;
|
||||
pm_idle = acpi_processor_idle;
|
||||
}
|
||||
#endif
|
||||
}
|
||||
|
||||
/* 'power' [R] */
|
||||
@ -1850,34 +1264,12 @@ int acpi_processor_power_exit(struct acpi_processor *pr,
|
||||
if (boot_option_idle_override)
|
||||
return 0;
|
||||
|
||||
#ifdef CONFIG_CPU_IDLE
|
||||
cpuidle_unregister_device(&pr->power.dev);
|
||||
#endif
|
||||
pr->flags.power_setup_done = 0;
|
||||
|
||||
if (acpi_device_dir(device))
|
||||
remove_proc_entry(ACPI_PROCESSOR_FILE_POWER,
|
||||
acpi_device_dir(device));
|
||||
|
||||
#ifndef CONFIG_CPU_IDLE
|
||||
|
||||
/* Unregister the idle handler when processor #0 is removed. */
|
||||
if (pr->id == 0) {
|
||||
if (pm_idle_save)
|
||||
pm_idle = pm_idle_save;
|
||||
|
||||
/*
|
||||
* We are about to unload the current idle thread pm callback
|
||||
* (pm_idle), Wait for all processors to update cached/local
|
||||
* copies of pm_idle before proceeding.
|
||||
*/
|
||||
cpu_idle_wait();
|
||||
#ifdef CONFIG_SMP
|
||||
pm_qos_remove_notifier(PM_QOS_CPU_DMA_LATENCY,
|
||||
&acpi_processor_latency_notifier);
|
||||
#endif
|
||||
}
|
||||
#endif
|
||||
|
||||
return 0;
|
||||
}
|
||||
|
||||
Loading…
Reference in New Issue
Block a user