AcoSail/kernel_optimize_test
8
0
Fork 0
forked from luck/tmp_suning_uos_patched
Code Pull Requests Activity

MIPS: SPRAM: Clean up support code a little

Browse Source 
Signed-off-by: Chris Dearman <chris@mips.com>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Chris Dearman 2009-07-10 01:51:27 -07:00 committed by Ralf Baechle
parent a4e7cac18f
commit a074f0e89f
3 changed files with 12 additions and 10 deletions
Show Stats Download Patch File Download Diff File Expand all files Collapse all files

10
arch/mips/include/asm/spram.h Normal file
View File

@ -0,0 +1,10 @@
#ifndef _MIPS_SPRAM_H
#define _MIPS_SPRAM_H
#ifdef CONFIG_CPU_MIPSR2
extern __init void spram_config(void);
#else
static inline void spram_config(void) { };
#endif /* CONFIG_CPU_MIPSR2 */
#endif /* _MIPS_SPRAM_H */

8
arch/mips/kernel/cpu-probe.c
View File

@ -23,7 +23,7 @@
#include <asm/mipsregs.h>
#include <asm/system.h>
#include <asm/watch.h>
#include <asm/spram.h>
/*
* Not all of the MIPS CPUs have the "wait" instruction available. Moreover,
* the implementation of the "wait" feature differs between CPU families. This
@ -711,12 +711,6 @@ static void __cpuinit decode_configs(struct cpuinfo_mips *c)
mips_probe_watch_registers(c);
}
#ifdef CONFIG_CPU_MIPSR2
extern void spram_config(void);
#else
static inline void spram_config(void) {}
#endif
static inline void cpu_probe_mips(struct cpuinfo_mips *c, unsigned int cpu)
{
decode_configs(c);

4
arch/mips/kernel/spram.c
View File

@ -13,7 +13,6 @@
#include <linux/ptrace.h>
#include <linux/stddef.h>
#include <asm/cpu.h>
#include <asm/fpu.h>
#include <asm/mipsregs.h>
#include <asm/system.h>
@ -198,8 +197,7 @@ static __cpuinit void probe_spram(char *type,
offset += 2 * SPRAM_TAG_STRIDE;
}
}
__cpuinit void spram_config(void)
void __cpuinit spram_config(void)
{
struct cpuinfo_mips *c = &current_cpu_data;
unsigned int config0;