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ASoC: AMD: Change MCLK to 48Mhz

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25Mhz MCLK which was earlier used was of spread type.
Thus, we were not getting accurate rate. The 48Mhz system
clk is of non-spread type and we are changing to it to get
accurate rate.

Signed-off-by: Akshu Agrawal <akshu.agrawal@amd.com>
Reviewed-by: Daniel Kurtz <djkurtz@chromium.org>
Signed-off-by: Mark Brown <broonie@kernel.org>
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Akshu Agrawal 2018-08-21 12:29:43 +05:30 committed by Mark Brown
parent c736cbd3a6
commit a1b1e9880f
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1 changed files with 1 additions and 1 deletions
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sound/soc/amd/acp-da7219-max98357a.c
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@ -42,7 +42,7 @@
#include "../codecs/da7219.h"
#include "../codecs/da7219-aad.h"
#define CZ_PLAT_CLK 25000000
#define CZ_PLAT_CLK 48000000
#define DUAL_CHANNEL 2
static struct snd_soc_jack cz_jack;