forked from luck/tmp_suning_uos_patched
MIPS: perf: Fix wrong check condition of Loongson event IDs
According to the user's manual chapter 8.2.1 of Loongson 3A2000 CPU [1]
and 3A3000 CPU [2], we should take some event IDs such as 274, 358, 359
and 360 as valid in the check condition, otherwise they are recognized
as "not supported", fix it.
[1] http://www.loongson.cn/uploadfile/cpu/3A2000/Loongson3A2000_user2.pdf
[2] http://www.loongson.cn/uploadfile/cpu/3A3000/Loongson3A3000_3B3000user2.pdf
Fixes: e9dfbaaeef
("MIPS: perf: Add hardware perf events support for new Loongson-3")
Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn>
Acked-by: Huang Pei <huangpei@loongson.cn>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
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91dbd73a17
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a231995700
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@ -1898,8 +1898,8 @@ static const struct mips_perf_event *mipsxx_pmu_map_raw_event(u64 config)
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(base_id >= 64 && base_id < 90) ||
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(base_id >= 128 && base_id < 164) ||
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(base_id >= 192 && base_id < 200) ||
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(base_id >= 256 && base_id < 274) ||
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(base_id >= 320 && base_id < 358) ||
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(base_id >= 256 && base_id < 275) ||
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(base_id >= 320 && base_id < 361) ||
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(base_id >= 384 && base_id < 574))
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break;
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