forked from luck/tmp_suning_uos_patched
clocksource: mips-gic: Combine with GIC clockevent driver
Combine the GIC clocksource driver with the GIC clockevent driver from arch/mips/kernel/cevt-gic.c and remove the clockevent driver's separate Kconfig symbol. Signed-off-by: Andrew Bresticker <abrestic@chromium.org> Cc: Daniel Lezcano <daniel.lezcano@linaro.org> Cc: Thomas Gleixner <tglx@linutronix.de> Cc: Jason Cooper <jason@lakedaemon.net> Cc: Andrew Bresticker <abrestic@chromium.org> Cc: Paul Burton <paul.burton@imgtec.com> Cc: Qais Yousef <qais.yousef@imgtec.com> Cc: John Crispin <blogic@openwrt.org> Cc: linux-mips@linux-mips.org Cc: linux-kernel@vger.kernel.org Patchwork: https://patchwork.linux-mips.org/patch/8132/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Andrew Bresticker
Ralf Baechle
parent
fa5635a277
commit
a331ce63c8
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@ -935,10 +935,6 @@ config CEVT_GT641XX
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config CEVT_R4K
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bool
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config CEVT_GIC
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select MIPS_CM
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bool
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config CEVT_SB1250
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bool
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@ -1911,15 +1907,6 @@ config FORCE_MAX_ZONEORDER
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The page size is not necessarily 4KB. Keep this in mind
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when choosing a value for this option.
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config CEVT_GIC
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bool "Use GIC global counter for clock events"
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depends on MIPS_GIC && !MIPS_SEAD3
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help
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Use the GIC global counter for the clock events. The R4K clock
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event driver is always present, so if the platform ends up not
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detecting a GIC, it will fall back to the R4K timer for the
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generation of clock events.
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config BOARD_SCACHE
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bool
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@ -57,7 +57,7 @@ extern int gic_clockevent_init(void);
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static inline int mips_clockevent_init(void)
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{
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#if defined(CONFIG_CEVT_GIC)
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#if defined(CONFIG_CLKSRC_MIPS_GIC)
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return (gic_clockevent_init() | r4k_clockevent_init());
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#elif defined(CONFIG_CEVT_R4K)
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return r4k_clockevent_init();
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@ -19,7 +19,6 @@ endif
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obj-$(CONFIG_CEVT_BCM1480) += cevt-bcm1480.o
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obj-$(CONFIG_CEVT_R4K) += cevt-r4k.o
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obj-$(CONFIG_CEVT_DS1287) += cevt-ds1287.o
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obj-$(CONFIG_CEVT_GIC) += cevt-gic.o
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obj-$(CONFIG_CEVT_GT641XX) += cevt-gt641xx.o
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obj-$(CONFIG_CEVT_SB1250) += cevt-sb1250.o
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obj-$(CONFIG_CEVT_TXX9) += cevt-txx9.o
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@ -1,103 +0,0 @@
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/*
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* This file is subject to the terms and conditions of the GNU General Public
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* License. See the file "COPYING" in the main directory of this archive
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* for more details.
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*
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* Copyright (C) 2013 Imagination Technologies Ltd.
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*/
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#include <linux/clockchips.h>
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#include <linux/interrupt.h>
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#include <linux/percpu.h>
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#include <linux/smp.h>
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#include <linux/irq.h>
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#include <linux/irqchip/mips-gic.h>
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#include <asm/time.h>
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#include <asm/mips-boards/maltaint.h>
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DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
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int gic_timer_irq_installed;
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static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
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{
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u64 cnt;
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int res;
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cnt = gic_read_count();
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cnt += (u64)delta;
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gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
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res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
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return res;
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}
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void gic_set_clock_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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/* Nothing to do ... */
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}
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irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *cd;
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int cpu = smp_processor_id();
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gic_write_compare(gic_read_compare());
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cd = &per_cpu(gic_clockevent_device, cpu);
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cd->event_handler(cd);
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return IRQ_HANDLED;
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}
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struct irqaction gic_compare_irqaction = {
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.handler = gic_compare_interrupt,
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.flags = IRQF_PERCPU | IRQF_TIMER,
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.name = "timer",
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};
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void gic_event_handler(struct clock_event_device *dev)
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{
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}
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int gic_clockevent_init(void)
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{
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unsigned int cpu = smp_processor_id();
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struct clock_event_device *cd;
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unsigned int irq;
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if (!cpu_has_counter || !gic_frequency)
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return -ENXIO;
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irq = MIPS_GIC_IRQ_BASE + GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
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cd = &per_cpu(gic_clockevent_device, cpu);
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cd->name = "MIPS GIC";
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cd->features = CLOCK_EVT_FEAT_ONESHOT |
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CLOCK_EVT_FEAT_C3STOP;
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clockevent_set_clock(cd, gic_frequency);
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/* Calculate the min / max delta */
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cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
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cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
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cd->rating = 300;
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cd->irq = irq;
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cd->cpumask = cpumask_of(cpu);
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cd->set_next_event = gic_next_event;
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cd->set_mode = gic_set_clock_mode;
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cd->event_handler = gic_event_handler;
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clockevents_register_device(cd);
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if (!gic_timer_irq_installed) {
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setup_percpu_irq(irq, &gic_compare_irqaction);
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gic_timer_irq_installed = 1;
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}
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enable_percpu_irq(irq, IRQ_TYPE_NONE);
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return 0;
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}
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@ -5,10 +5,100 @@
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*
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* Copyright (C) 2012 MIPS Technologies, Inc. All rights reserved.
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*/
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#include <linux/clockchips.h>
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#include <linux/init.h>
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#include <linux/interrupt.h>
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#include <linux/irqchip/mips-gic.h>
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#include <linux/percpu.h>
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#include <linux/smp.h>
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#include <linux/time.h>
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#include <asm/time.h>
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DEFINE_PER_CPU(struct clock_event_device, gic_clockevent_device);
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int gic_timer_irq_installed;
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static int gic_next_event(unsigned long delta, struct clock_event_device *evt)
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{
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u64 cnt;
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int res;
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cnt = gic_read_count();
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cnt += (u64)delta;
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gic_write_cpu_compare(cnt, cpumask_first(evt->cpumask));
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res = ((int)(gic_read_count() - cnt) >= 0) ? -ETIME : 0;
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return res;
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}
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void gic_set_clock_mode(enum clock_event_mode mode,
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struct clock_event_device *evt)
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{
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/* Nothing to do ... */
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}
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irqreturn_t gic_compare_interrupt(int irq, void *dev_id)
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{
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struct clock_event_device *cd;
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int cpu = smp_processor_id();
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gic_write_compare(gic_read_compare());
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cd = &per_cpu(gic_clockevent_device, cpu);
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cd->event_handler(cd);
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return IRQ_HANDLED;
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}
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struct irqaction gic_compare_irqaction = {
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.handler = gic_compare_interrupt,
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.flags = IRQF_PERCPU | IRQF_TIMER,
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.name = "timer",
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};
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void gic_event_handler(struct clock_event_device *dev)
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{
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}
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int gic_clockevent_init(void)
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{
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unsigned int cpu = smp_processor_id();
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struct clock_event_device *cd;
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unsigned int irq;
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if (!cpu_has_counter || !gic_frequency)
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return -ENXIO;
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irq = MIPS_GIC_IRQ_BASE + GIC_LOCAL_TO_HWIRQ(GIC_LOCAL_INT_COMPARE);
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cd = &per_cpu(gic_clockevent_device, cpu);
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cd->name = "MIPS GIC";
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cd->features = CLOCK_EVT_FEAT_ONESHOT |
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CLOCK_EVT_FEAT_C3STOP;
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clockevent_set_clock(cd, gic_frequency);
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/* Calculate the min / max delta */
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cd->max_delta_ns = clockevent_delta2ns(0x7fffffff, cd);
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cd->min_delta_ns = clockevent_delta2ns(0x300, cd);
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cd->rating = 300;
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cd->irq = irq;
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cd->cpumask = cpumask_of(cpu);
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cd->set_next_event = gic_next_event;
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cd->set_mode = gic_set_clock_mode;
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cd->event_handler = gic_event_handler;
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clockevents_register_device(cd);
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if (!gic_timer_irq_installed) {
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setup_percpu_irq(irq, &gic_compare_irqaction);
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gic_timer_irq_installed = 1;
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}
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enable_percpu_irq(irq, IRQ_TYPE_NONE);
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return 0;
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}
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static cycle_t gic_hpt_read(struct clocksource *cs)
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{
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return gic_read_count();
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@ -103,7 +103,7 @@ static inline void gic_map_to_vpe(unsigned int intr, unsigned int vpe)
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GIC_SH_MAP_TO_VPE_REG_BIT(vpe));
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}
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#if defined(CONFIG_CLKSRC_MIPS_GIC) || defined(CONFIG_CEVT_GIC)
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#ifdef CONFIG_CLKSRC_MIPS_GIC
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cycle_t gic_read_count(void)
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{
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unsigned int hi, hi2, lo;
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