AcoSail/kernel_optimize_test
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MIPS: Remove gic_{enable,disable}_interrupt()

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Nothing calls gic_{enable,disable}_interrupt() any more.

Signed-off-by: Andrew Bresticker <abrestic@chromium.org>
Reviewed-by: Qais Yousef <qais.yousef@imgtec.com>
Tested-by: Qais Yousef <qais.yousef@imgtec.com>
Cc: Thomas Gleixner <tglx@linutronix.de>
Cc: Jason Cooper <jason@lakedaemon.net>
Cc: Andrew Bresticker <abrestic@chromium.org>
Cc: Jeffrey Deans <jeffrey.deans@imgtec.com>
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: Qais Yousef <qais.yousef@imgtec.com>
Cc: Jonas Gorski <jogo@openwrt.org>
Cc: John Crispin <blogic@openwrt.org>
Cc: David Daney <ddaney.cavm@gmail.com>
Cc: linux-mips@linux-mips.org
Cc: linux-kernel@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/7806/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
This commit is contained in:
Andrew Bresticker 2014-09-18 14:47:14 -07:00 committed by Ralf Baechle
parent ff1e29ade4
commit a67b3cf1af
3 changed files with 0 additions and 46 deletions
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2
arch/mips/include/asm/gic.h
View File

@ -376,8 +376,6 @@ extern void gic_bind_eic_interrupt(int irq, int set);
extern unsigned int gic_get_timer_pending(void);
extern void gic_get_int_mask(unsigned long *dst, const unsigned long *src);
extern unsigned int gic_get_int(void);
extern void gic_enable_interrupt(int irq_vec);
extern void gic_disable_interrupt(int irq_vec);
extern void gic_irq_ack(struct irq_data *d);
extern void gic_finish_irq(struct irq_data *d);
extern void gic_platform_init(int irqs, struct irq_chip *irq_controller);

10
arch/mips/mti-malta/malta-int.c
View File

@ -715,16 +715,6 @@ int malta_be_handler(struct pt_regs *regs, int is_fixup)
return retval;
}
void gic_enable_interrupt(int irq_vec)
{
GIC_SET_INTR_MASK(irq_vec);
}
void gic_disable_interrupt(int irq_vec)
{
GIC_CLR_INTR_MASK(irq_vec);
}
void gic_irq_ack(struct irq_data *d)
{
int irq = (d->irq - gic_irq_base);

34
arch/mips/mti-sead3/sead3-int.c
View File

@ -85,40 +85,6 @@ void __init arch_init_irq(void)
ARRAY_SIZE(gic_intr_map), MIPS_GIC_IRQ_BASE);
}
void gic_enable_interrupt(int irq_vec)
{
unsigned int i, irq_source;
/* enable all the interrupts associated with this vector */
for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) {
irq_source = gic_shared_intr_map[irq_vec].intr_list[i];
GIC_SET_INTR_MASK(irq_source);
}
/* enable all local interrupts associated with this vector */
if (gic_shared_intr_map[irq_vec].local_intr_mask) {
GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0);
GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_SMASK),
gic_shared_intr_map[irq_vec].local_intr_mask);
}
}
void gic_disable_interrupt(int irq_vec)
{
unsigned int i, irq_source;
/* disable all the interrupts associated with this vector */
for (i = 0; i < gic_shared_intr_map[irq_vec].num_shared_intr; i++) {
irq_source = gic_shared_intr_map[irq_vec].intr_list[i];
GIC_CLR_INTR_MASK(irq_source);
}
/* disable all local interrupts associated with this vector */
if (gic_shared_intr_map[irq_vec].local_intr_mask) {
GICWRITE(GIC_REG(VPE_LOCAL, GIC_VPE_OTHER_ADDR), 0);
GICWRITE(GIC_REG(VPE_OTHER, GIC_VPE_RMASK),
gic_shared_intr_map[irq_vec].local_intr_mask);
}
}
void gic_irq_ack(struct irq_data *d)
{
GIC_CLR_INTR_MASK(d->irq - gic_irq_base);