forked from luck/tmp_suning_uos_patched
[SCSI] ipr: define new offsets to registers for the next generation chip
This patch adds the entry to the ipr_chip_cfg array that defines the register offsets for the next generation 64 bit IOA PCI interface chip. Signed-off-by: Wayne Boyer <wayneb@linux.vnet.ibm.com> Signed-off-by: James Bottomley <James.Bottomley@suse.de>
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a32c055fee
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@ -128,6 +128,21 @@ static const struct ipr_chip_cfg_t ipr_chip_cfg[] = {
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.clr_uproc_interrupt_reg = 0x00294
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}
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},
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{ /* CRoC */
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.mailbox = 0x00040,
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.cache_line_size = 0x20,
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{
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.set_interrupt_mask_reg = 0x00010,
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.clr_interrupt_mask_reg = 0x00018,
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.sense_interrupt_mask_reg = 0x00010,
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.clr_interrupt_reg = 0x00008,
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.sense_interrupt_reg = 0x00000,
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.ioarrin_reg = 0x00070,
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.sense_uproc_interrupt_reg = 0x00020,
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.set_uproc_interrupt_reg = 0x00020,
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.clr_uproc_interrupt_reg = 0x00028
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}
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},
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};
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static const struct ipr_chip_t ipr_chip[] = {
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