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sh: pci: Consolidate PCI I/O and mem window definitions for SH7780.

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This consolidates all of the PCI I/O and memory window definitions across
the pci-sh7780 users in pci-sh7780 itself. No functional changes, in that
every platform had exactly the same implementation.

Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This commit is contained in:
Paul Mundt 2009-04-17 17:07:47 +09:00
parent f1dcab7566
commit ab1363a892
6 changed files with 27 additions and 90 deletions
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23
arch/sh/drivers/pci/ops-r7780rp.c
View File

@ -26,27 +26,6 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
return irq_tab[slot];
}
static struct resource sh7780_io_resource = {
.name = "SH7780_IO",
.start = SH7780_PCI_IO_BASE,
.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sh7780_mem_resource = {
.name = "SH7780_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
extern struct pci_ops sh7780_pci_ops;
struct pci_channel board_pci_channels[] = {
{ sh7780_pci_init, &sh4_pci_ops, &sh7780_io_resource, &sh7780_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
static struct sh4_pci_address_map sh7780_pci_map = {
.window0 = {
.base = SH7780_CS2_BASE_ADDR,
@ -61,5 +40,5 @@ static struct sh4_pci_address_map sh7780_pci_map = {
int __init pcibios_init_platform(void)
{
return sh7780_pcic_init(&board_pci_channels[0], &sh7780_pci_map);
return sh7780_pcic_init(&sh7780_pci_map);
}

21
arch/sh/drivers/pci/ops-sdk7780.c
View File

@ -34,25 +34,6 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
return sdk7780_irq_tab[pin-1][slot];
}
static struct resource sdk7780_io_resource = {
.name = "SH7780_IO",
.start = SH7780_PCI_IO_BASE,
.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sdk7780_mem_resource = {
.name = "SH7780_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
struct pci_channel board_pci_channels[] = {
{ sh7780_pci_init, &sh4_pci_ops, &sdk7780_io_resource, &sdk7780_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
static struct sh4_pci_address_map sdk7780_pci_map = {
.window0 = {
.base = SH7780_CS2_BASE_ADDR,
@ -67,5 +48,5 @@ static struct sh4_pci_address_map sdk7780_pci_map = {
int __init pcibios_init_platform(void)
{
printk(KERN_INFO "SH7780 PCI: Finished initializing PCI controller\n");
return sh7780_pcic_init(&board_pci_channels[0], &sdk7780_pci_map);
return sh7780_pcic_init(&sdk7780_pci_map);
}

23
arch/sh/drivers/pci/ops-se7780.c
View File

@ -41,27 +41,6 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
return se7780_irq_tab[pin-1][slot];
}
static struct resource se7780_io_resource = {
.name = "SH7780_IO",
.start = SH7780_PCI_IO_BASE,
.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource se7780_mem_resource = {
.name = "SH7780_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
extern struct pci_ops se7780_pci_ops;
struct pci_channel board_pci_channels[] = {
{ sh7780_pci_init, &sh4_pci_ops, &se7780_io_resource, &se7780_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
static struct sh4_pci_address_map se7780_pci_map = {
.window0 = {
.base = SH7780_CS2_BASE_ADDR,
@ -90,5 +69,5 @@ int __init pcibios_init_platform(void)
ctrl_outw(0x0013, FPGA_PCI_INTSEL1);
ctrl_outw(0xE402, FPGA_PCI_INTSEL2);
return sh7780_pcic_init(&board_pci_channels[0], &se7780_pci_map);
return sh7780_pcic_init(&se7780_pci_map);
}

21
arch/sh/drivers/pci/ops-sh7785lcr.c
View File

@ -26,25 +26,6 @@ int __init pcibios_map_platform_irq(struct pci_dev *pdev, u8 slot, u8 pin)
return irq_tab[slot];
}
static struct resource sh7785_io_resource = {
.name = "SH7785_IO",
.start = SH7780_PCI_IO_BASE,
.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sh7785_mem_resource = {
.name = "SH7785_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
struct pci_channel board_pci_channels[] = {
{ sh7780_pci_init, &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
static struct sh4_pci_address_map sh7785_pci_map = {
.window0 = {
#if defined(CONFIG_32BIT)
@ -59,5 +40,5 @@ static struct sh4_pci_address_map sh7785_pci_map = {
int __init pcibios_init_platform(void)
{
return sh7780_pcic_init(&board_pci_channels[0], &sh7785_pci_map);
return sh7780_pcic_init(&sh7785_pci_map);
}

25
arch/sh/drivers/pci/pci-sh7780.c
View File

@ -22,7 +22,7 @@
#include <linux/delay.h>
#include "pci-sh4.h"
int __init sh7780_pci_init(struct pci_channel *chan)
static int __init sh7780_pci_init(struct pci_channel *chan)
{
unsigned int id;
const char *type = NULL;
@ -71,9 +71,28 @@ int __init sh7780_pci_init(struct pci_channel *chan)
extern u8 pci_cache_line_size;
int __init sh7780_pcic_init(struct pci_channel *chan,
struct sh4_pci_address_map *map)
static struct resource sh7785_io_resource = {
.name = "SH7785_IO",
.start = SH7780_PCI_IO_BASE,
.end = SH7780_PCI_IO_BASE + SH7780_PCI_IO_SIZE - 1,
.flags = IORESOURCE_IO
};
static struct resource sh7785_mem_resource = {
.name = "SH7785_mem",
.start = SH7780_PCI_MEMORY_BASE,
.end = SH7780_PCI_MEMORY_BASE + SH7780_PCI_MEM_SIZE - 1,
.flags = IORESOURCE_MEM
};
struct pci_channel board_pci_channels[] = {
{ sh7780_pci_init, &sh4_pci_ops, &sh7785_io_resource, &sh7785_mem_resource, 0, 0xff },
{ NULL, NULL, NULL, 0, 0 },
};
int __init sh7780_pcic_init(struct sh4_pci_address_map *map)
{
struct pci_channel *chan = &board_pci_channels[0];
u32 word;
/*

4
arch/sh/drivers/pci/pci-sh7780.h
View File

@ -107,8 +107,6 @@
struct sh4_pci_address_map;
/* arch/sh/drivers/pci/pci-sh7780.c */
int sh7780_pci_init(struct pci_channel *chan);
int sh7780_pcic_init(struct pci_channel *chan,
struct sh4_pci_address_map *map);
int sh7780_pcic_init(struct sh4_pci_address_map *map);
#endif /* _PCI_SH7780_H_ */