forked from luck/tmp_suning_uos_patched
ARM: tegra: move serial clock-frequency attr into the Tegra20 dtsi
No Tegra20 Platform is running PLL_P at another rate than 216MHz, nor is any using any other PLL as UART source clock. Move attribute into SoC level dtsi file to slim down board DT files. Signed-off-by: Lucas Stach <dev@lynxeye.de> Signed-off-by: Stephen Warren <swarren@nvidia.com>
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@ -252,7 +252,6 @@ i2s@70002800 {
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serial@70006300 {
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status = "okay";
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clock-frequency = <216000000>;
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};
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i2c@7000c000 {
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@ -244,12 +244,10 @@ i2s@70002800 {
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serial@70006000 {
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status = "okay";
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clock-frequency = <216000000>;
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};
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serial@70006200 {
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status = "okay";
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clock-frequency = <216000000>;
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};
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i2c@7000c000 {
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@ -303,7 +303,6 @@ i2s@70002800 {
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serial@70006300 {
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status = "okay";
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clock-frequency = <216000000>;
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};
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i2c@7000c000 {
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@ -276,7 +276,6 @@ i2s@70002800 {
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};
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serial@70006300 {
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clock-frequency = <216000000>;
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status = "okay";
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};
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@ -263,7 +263,6 @@ i2s@70002800 {
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serial@70006000 {
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status = "okay";
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clock-frequency = <216000000>;
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};
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dvi_ddc: i2c@7000c000 {
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@ -300,7 +300,6 @@ i2s@70002800 {
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serial@70006300 {
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status = "okay";
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clock-frequency = <216000000>;
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};
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i2c@7000c000 {
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@ -255,7 +255,6 @@ i2s@70002800 {
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serial@70006000 {
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status = "okay";
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clock-frequency = <216000000>;
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};
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hdmi_ddc: i2c@7000c400 {
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@ -247,6 +247,7 @@ uarta: serial@70006000 {
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reg = <0x70006000 0x40>;
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reg-shift = <2>;
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interrupts = <0 36 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 8>;
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clocks = <&tegra_car 6>;
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status = "disabled";
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@ -257,6 +258,7 @@ uartb: serial@70006040 {
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reg = <0x70006040 0x40>;
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reg-shift = <2>;
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interrupts = <0 37 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 9>;
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clocks = <&tegra_car 96>;
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status = "disabled";
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@ -267,6 +269,7 @@ uartc: serial@70006200 {
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reg = <0x70006200 0x100>;
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reg-shift = <2>;
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interrupts = <0 46 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 10>;
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clocks = <&tegra_car 55>;
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status = "disabled";
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@ -277,6 +280,7 @@ uartd: serial@70006300 {
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reg = <0x70006300 0x100>;
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reg-shift = <2>;
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interrupts = <0 90 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 19>;
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clocks = <&tegra_car 65>;
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status = "disabled";
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@ -287,6 +291,7 @@ uarte: serial@70006400 {
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reg = <0x70006400 0x100>;
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reg-shift = <2>;
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interrupts = <0 91 0x04>;
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clock-frequency = <216000000>;
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nvidia,dma-request-selector = <&apbdma 20>;
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clocks = <&tegra_car 66>;
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status = "disabled";
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