forked from luck/tmp_suning_uos_patched
sata_inic162x: kill now unused bmdma related stuff
sata_inic162x doesn't use BMDMA anymore. Kill bmdma related stuff. * prdctl manipulation * port IRQ mask manipulation * inherit ATA_BASE_SHT instead of ATA_BMDMA_SHT * BMDMA methods Signed-off-by: Tejun Heo <htejun@gmail.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
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@ -101,9 +101,7 @@ enum {
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PIRQ_PENDING = (1 << 7), /* port IRQ pending (STAT only) */
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PIRQ_ERR = PIRQ_OFFLINE | PIRQ_ONLINE | PIRQ_FATAL,
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PIRQ_MASK_DMA_READ = PIRQ_REPLY | PIRQ_ATA,
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PIRQ_MASK_OTHER = PIRQ_REPLY | PIRQ_COMPLETE,
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PIRQ_MASK_DEFAULT = PIRQ_REPLY,
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PIRQ_MASK_FREEZE = 0xff,
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/* PORT_PRD_CTL bits */
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@ -206,13 +204,11 @@ struct inic_port_priv {
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dma_addr_t pkt_dma;
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u32 *cpb_tbl;
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dma_addr_t cpb_tbl_dma;
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u8 dfl_prdctl;
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u8 cached_prdctl;
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u8 cached_pirq_mask;
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};
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static struct scsi_host_template inic_sht = {
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ATA_BMDMA_SHT(DRV_NAME),
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ATA_BASE_SHT(DRV_NAME),
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.sg_tablesize = LIBATA_MAX_PRD, /* maybe it can be larger? */
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.dma_boundary = INIC_DMA_BOUNDARY,
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};
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@ -227,23 +223,6 @@ static void __iomem *inic_port_base(struct ata_port *ap)
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return ap->host->iomap[MMIO_BAR] + ap->port_no * PORT_SIZE;
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}
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static void __inic_set_pirq_mask(struct ata_port *ap, u8 mask)
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{
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void __iomem *port_base = inic_port_base(ap);
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struct inic_port_priv *pp = ap->private_data;
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writeb(mask, port_base + PORT_IRQ_MASK);
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pp->cached_pirq_mask = mask;
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}
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static void inic_set_pirq_mask(struct ata_port *ap, u8 mask)
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{
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struct inic_port_priv *pp = ap->private_data;
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if (pp->cached_pirq_mask != mask)
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__inic_set_pirq_mask(ap, mask);
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}
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static void inic_reset_port(void __iomem *port_base)
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{
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void __iomem *idma_ctl = port_base + PORT_IDMA_CTL;
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@ -297,63 +276,6 @@ static int inic_scr_write(struct ata_port *ap, unsigned sc_reg, u32 val)
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return 0;
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}
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/*
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* In TF mode, inic162x is very similar to SFF device. TF registers
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* function the same. DMA engine behaves similary using the same PRD
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* format as BMDMA but different command register, interrupt and event
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* notification methods are used. The following inic_bmdma_*()
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* functions do the impedance matching.
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*/
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static void inic_bmdma_setup(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct inic_port_priv *pp = ap->private_data;
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void __iomem *port_base = inic_port_base(ap);
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int rw = qc->tf.flags & ATA_TFLAG_WRITE;
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/* make sure device sees PRD table writes */
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wmb();
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/* load transfer length */
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writel(qc->nbytes, port_base + PORT_PRD_XFERLEN);
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/* turn on DMA and specify data direction */
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pp->cached_prdctl = pp->dfl_prdctl | PRD_CTL_DMAEN;
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if (!rw)
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pp->cached_prdctl |= PRD_CTL_WR;
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writeb(pp->cached_prdctl, port_base + PORT_PRD_CTL);
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/* issue r/w command */
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ap->ops->sff_exec_command(ap, &qc->tf);
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}
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static void inic_bmdma_start(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct inic_port_priv *pp = ap->private_data;
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void __iomem *port_base = inic_port_base(ap);
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/* start host DMA transaction */
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pp->cached_prdctl |= PRD_CTL_START;
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writeb(pp->cached_prdctl, port_base + PORT_PRD_CTL);
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}
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static void inic_bmdma_stop(struct ata_queued_cmd *qc)
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{
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struct ata_port *ap = qc->ap;
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struct inic_port_priv *pp = ap->private_data;
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void __iomem *port_base = inic_port_base(ap);
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/* stop DMA engine */
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writeb(pp->dfl_prdctl, port_base + PORT_PRD_CTL);
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}
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static u8 inic_bmdma_status(struct ata_port *ap)
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{
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/* event is already verified by the interrupt handler */
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return ATA_DMA_INTR;
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}
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static void inic_stop_idma(struct ata_port *ap)
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{
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void __iomem *port_base = inic_port_base(ap);
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@ -631,8 +553,7 @@ static void inic_freeze(struct ata_port *ap)
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{
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void __iomem *port_base = inic_port_base(ap);
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__inic_set_pirq_mask(ap, PIRQ_MASK_FREEZE);
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writeb(PIRQ_MASK_FREEZE, port_base + PORT_IRQ_MASK);
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ap->ops->sff_check_status(ap);
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writeb(0xff, port_base + PORT_IRQ_STAT);
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}
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@ -643,8 +564,7 @@ static void inic_thaw(struct ata_port *ap)
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ap->ops->sff_check_status(ap);
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writeb(0xff, port_base + PORT_IRQ_STAT);
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__inic_set_pirq_mask(ap, PIRQ_MASK_OTHER);
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writeb(PIRQ_MASK_DEFAULT, port_base + PORT_IRQ_MASK);
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}
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static int inic_check_ready(struct ata_link *link)
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@ -707,7 +627,6 @@ static int inic_hardreset(struct ata_link *link, unsigned int *class,
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static void inic_error_handler(struct ata_port *ap)
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{
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void __iomem *port_base = inic_port_base(ap);
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struct inic_port_priv *pp = ap->private_data;
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unsigned long flags;
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/* reset PIO HSM and stop DMA engine */
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@ -715,7 +634,6 @@ static void inic_error_handler(struct ata_port *ap)
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spin_lock_irqsave(ap->lock, flags);
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ap->hsm_task_state = HSM_ST_IDLE;
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writeb(pp->dfl_prdctl, port_base + PORT_PRD_CTL);
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spin_unlock_irqrestore(ap->lock, flags);
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/* PIO and DMA engines have been stopped, perform recovery */
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@ -765,10 +683,8 @@ static int inic_port_resume(struct ata_port *ap)
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static int inic_port_start(struct ata_port *ap)
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{
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void __iomem *port_base = inic_port_base(ap);
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struct device *dev = ap->host->dev;
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struct inic_port_priv *pp;
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u8 tmp;
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int rc;
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/* alloc and initialize private data */
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@ -777,11 +693,6 @@ static int inic_port_start(struct ata_port *ap)
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return -ENOMEM;
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ap->private_data = pp;
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/* default PRD_CTL value, DMAEN, WR and START off */
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tmp = readb(port_base + PORT_PRD_CTL);
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tmp &= ~(PRD_CTL_DMAEN | PRD_CTL_WR | PRD_CTL_START);
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pp->dfl_prdctl = tmp;
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/* Alloc resources */
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rc = ata_port_start(ap);
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if (rc)
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@ -805,10 +716,6 @@ static int inic_port_start(struct ata_port *ap)
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static struct ata_port_operations inic_port_ops = {
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.inherits = &ata_sff_port_ops,
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.bmdma_setup = inic_bmdma_setup,
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.bmdma_start = inic_bmdma_start,
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.bmdma_stop = inic_bmdma_stop,
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.bmdma_status = inic_bmdma_status,
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.qc_prep = inic_qc_prep,
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.qc_issue = inic_qc_issue,
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.qc_fill_rtf = inic_qc_fill_rtf,
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