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include/asm-x86/msr.h: checkpatch cleanups - formatting only

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Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This commit is contained in:
Joe Perches 2008-03-23 01:02:51 -07:00 committed by Ingo Molnar
parent 934902b474
commit abb0ade013
1 changed files with 42 additions and 39 deletions
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81
include/asm-x86/msr.h
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@ -16,8 +16,8 @@
static inline unsigned long long native_read_tscp(unsigned int *aux)
{
unsigned long low, high;
asm volatile (".byte 0x0f,0x01,0xf9"
: "=a" (low), "=d" (high), "=c" (*aux));
asm volatile(".byte 0x0f,0x01,0xf9"
: "=a" (low), "=d" (high), "=c" (*aux));
return low | ((u64)high >> 32);
}
@ -29,7 +29,7 @@ static inline unsigned long long native_read_tscp(unsigned int *aux)
*/
#ifdef CONFIG_X86_64
#define DECLARE_ARGS(val, low, high) unsigned low, high
#define EAX_EDX_VAL(val, low, high) (low | ((u64)(high) << 32))
#define EAX_EDX_VAL(val, low, high) ((low) | ((u64)(high) << 32))
#define EAX_EDX_ARGS(val, low, high) "a" (low), "d" (high)
#define EAX_EDX_RET(val, low, high) "=a" (low), "=d" (high)
#else
@ -57,7 +57,7 @@ static inline unsigned long long native_read_msr_safe(unsigned int msr,
".section .fixup,\"ax\"\n\t"
"3: mov %3,%0 ; jmp 1b\n\t"
".previous\n\t"
_ASM_EXTABLE(2b,3b)
_ASM_EXTABLE(2b, 3b)
: "=r" (*err), EAX_EDX_RET(val, low, high)
: "c" (msr), "i" (-EFAULT));
return EAX_EDX_VAL(val, low, high);
@ -78,10 +78,10 @@ static inline int native_write_msr_safe(unsigned int msr,
".section .fixup,\"ax\"\n\t"
"3: mov %4,%0 ; jmp 1b\n\t"
".previous\n\t"
_ASM_EXTABLE(2b,3b)
_ASM_EXTABLE(2b, 3b)
: "=a" (err)
: "c" (msr), "0" (low), "d" (high),
"i" (-EFAULT));
"i" (-EFAULT));
return err;
}
@ -116,23 +116,23 @@ static inline unsigned long long native_read_pmc(int counter)
* pointer indirection), this allows gcc to optimize better
*/
#define rdmsr(msr,val1,val2) \
do { \
u64 __val = native_read_msr(msr); \
(val1) = (u32)__val; \
(val2) = (u32)(__val >> 32); \
} while(0)
#define rdmsr(msr, val1, val2) \
do { \
u64 __val = native_read_msr((msr)); \
(val1) = (u32)__val; \
(val2) = (u32)(__val >> 32); \
} while (0)
static inline void wrmsr(unsigned msr, unsigned low, unsigned high)
{
native_write_msr(msr, low, high);
}
#define rdmsrl(msr,val) \
((val) = native_read_msr(msr))
#define rdmsrl(msr, val) \
((val) = native_read_msr((msr)))
#define wrmsrl(msr, val) \
native_write_msr(msr, (u32)((u64)(val)), (u32)((u64)(val) >> 32))
native_write_msr((msr), (u32)((u64)(val)), (u32)((u64)(val) >> 32))
/* wrmsr with exception handling */
static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
@ -141,14 +141,14 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
}
/* rdmsr with exception handling */
#define rdmsr_safe(msr,p1,p2) \
({ \
int __err; \
u64 __val = native_read_msr_safe(msr, &__err); \
(*p1) = (u32)__val; \
(*p2) = (u32)(__val >> 32); \
__err; \
})
#define rdmsr_safe(msr, p1, p2) \
({ \
int __err; \
u64 __val = native_read_msr_safe((msr), &__err); \
(*p1) = (u32)__val; \
(*p2) = (u32)(__val >> 32); \
__err; \
})
#define rdtscl(low) \
((low) = (u32)native_read_tsc())
@ -156,35 +156,37 @@ static inline int wrmsr_safe(unsigned msr, unsigned low, unsigned high)
#define rdtscll(val) \
((val) = native_read_tsc())
#define rdpmc(counter,low,high) \
do { \
u64 _l = native_read_pmc(counter); \
(low) = (u32)_l; \
(high) = (u32)(_l >> 32); \
} while(0)
#define rdpmc(counter, low, high) \
do { \
u64 _l = native_read_pmc((counter)); \
(low) = (u32)_l; \
(high) = (u32)(_l >> 32); \
} while (0)
#define rdtscp(low, high, aux) \
do { \
unsigned long long _val = native_read_tscp(&(aux)); \
(low) = (u32)_val; \
(high) = (u32)(_val >> 32); \
} while (0)
#define rdtscp(low, high, aux) \
do { \
unsigned long long _val = native_read_tscp(&(aux)); \
(low) = (u32)_val; \
(high) = (u32)(_val >> 32); \
} while (0)
#define rdtscpll(val, aux) (val) = native_read_tscp(&(aux))
#endif /* !CONFIG_PARAVIRT */
#define checking_wrmsrl(msr,val) wrmsr_safe(msr,(u32)(val),(u32)((val)>>32))
#define checking_wrmsrl(msr, val) wrmsr_safe((msr), (u32)(val), \
(u32)((val) >> 32))
#define write_tsc(val1,val2) wrmsr(0x10, val1, val2)
#define write_tsc(val1, val2) wrmsr(0x10, (val1), (val2))
#define write_rdtscp_aux(val) wrmsr(0xc0000103, val, 0)
#define write_rdtscp_aux(val) wrmsr(0xc0000103, (val), 0)
#ifdef CONFIG_SMP
void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h);
int wrmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h);
#else /* CONFIG_SMP */
static inline void rdmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
@ -195,7 +197,8 @@ static inline void wrmsr_on_cpu(unsigned int cpu, u32 msr_no, u32 l, u32 h)
{
wrmsr(msr_no, l, h);
}
static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no, u32 *l, u32 *h)
static inline int rdmsr_safe_on_cpu(unsigned int cpu, u32 msr_no,
u32 *l, u32 *h)
{
return rdmsr_safe(msr_no, l, h);
}