forked from luck/tmp_suning_uos_patched
ARM: OMAP: Apollon MMC support
Apollon board MMC supports on OMAP2 TODO: We have to check MMC on H4 Signed-off-by: Kyungmin Park <kyungmin.park@samsung.com> Signed-off-by: Tony Lindgren <tony@atomide.com>
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@ -166,8 +166,8 @@ static struct omap_uart_config apollon_uart_config __initdata = {
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static struct omap_mmc_config apollon_mmc_config __initdata = {
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.mmc [0] = {
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.enabled = 0,
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.wire4 = 0,
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.enabled = 1,
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.wire4 = 1,
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.wp_pin = -1,
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.power_pin = -1,
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.switch_pin = -1,
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@ -257,6 +257,9 @@ static void __init omap_apollon_init(void)
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/* REVISIT: where's the correct place */
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omap_cfg_reg(W19_24XX_SYS_NIRQ);
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/* Use Interal loop-back in MMC/SDIO Module Input Clock selection */
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CONTROL_DEVCONF |= (1 << 24);
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/*
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* Make sure the serial ports are muxed on at this point.
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* You have to mux them off in device drivers later on
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@ -104,6 +104,20 @@ MUX_CFG_24XX("P20_24XX_TSC_IRQ", 0x108, 0, 0, 0, 1)
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MUX_CFG_24XX("K15_24XX_UART3_TX", 0x118, 0, 0, 0, 1)
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MUX_CFG_24XX("K14_24XX_UART3_RX", 0x119, 0, 0, 0, 1)
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/* MMC/SDIO */
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MUX_CFG_24XX("G19_24XX_MMC_CLKO", 0x0f3, 0, 0, 0, 1)
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MUX_CFG_24XX("H18_24XX_MMC_CMD", 0x0f4, 0, 0, 0, 1)
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MUX_CFG_24XX("F20_24XX_MMC_DAT0", 0x0f5, 0, 0, 0, 1)
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MUX_CFG_24XX("H14_24XX_MMC_DAT1", 0x0f6, 0, 0, 0, 1)
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MUX_CFG_24XX("E19_24XX_MMC_DAT2", 0x0f7, 0, 0, 0, 1)
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MUX_CFG_24XX("D19_24XX_MMC_DAT3", 0x0f8, 0, 0, 0, 1)
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MUX_CFG_24XX("F19_24XX_MMC_DAT_DIR0", 0x0f9, 0, 0, 0, 1)
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MUX_CFG_24XX("E20_24XX_MMC_DAT_DIR1", 0x0fa, 0, 0, 0, 1)
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MUX_CFG_24XX("F18_24XX_MMC_DAT_DIR2", 0x0fb, 0, 0, 0, 1)
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MUX_CFG_24XX("E18_24XX_MMC_DAT_DIR3", 0x0fc, 0, 0, 0, 1)
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MUX_CFG_24XX("G18_24XX_MMC_CMD_DIR", 0x0fd, 0, 0, 0, 1)
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MUX_CFG_24XX("H15_24XX_MMC_CLKI", 0x0fe, 0, 0, 0, 1)
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/* Keypad GPIO*/
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MUX_CFG_24XX("T19_24XX_KBR0", 0x106, 3, 1, 1, 1)
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MUX_CFG_24XX("R19_24XX_KBR1", 0x107, 3, 1, 1, 1)
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@ -148,7 +148,7 @@ static inline void omap_init_kp(void) {}
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#ifdef CONFIG_ARCH_OMAP24XX
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#define OMAP_MMC1_BASE 0x4809c000
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#define OMAP_MMC1_INT 83
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#define OMAP_MMC1_INT INT_24XX_MMC_IRQ
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#else
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#define OMAP_MMC1_BASE 0xfffb7800
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#define OMAP_MMC1_INT INT_MMC
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@ -225,7 +225,14 @@ static void __init omap_init_mmc(void)
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/* block 1 is always available and has just one pinout option */
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mmc = &mmc_conf->mmc[0];
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if (mmc->enabled) {
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if (!cpu_is_omap24xx()) {
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(H18_24XX_MMC_CMD);
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omap_cfg_reg(H15_24XX_MMC_CLKI);
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omap_cfg_reg(G19_24XX_MMC_CLKO);
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omap_cfg_reg(F20_24XX_MMC_DAT0);
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omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
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omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
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} else {
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omap_cfg_reg(MMC_CMD);
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omap_cfg_reg(MMC_CLK);
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omap_cfg_reg(MMC_DAT0);
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@ -236,7 +243,14 @@ static void __init omap_init_mmc(void)
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}
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}
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if (mmc->wire4) {
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if (!cpu_is_omap24xx()) {
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if (cpu_is_omap24xx()) {
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omap_cfg_reg(H14_24XX_MMC_DAT1);
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omap_cfg_reg(E19_24XX_MMC_DAT2);
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omap_cfg_reg(D19_24XX_MMC_DAT3);
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omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
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omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
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omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
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} else {
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omap_cfg_reg(MMC_DAT1);
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/* NOTE: DAT2 can be on W10 (here) or M15 */
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if (!mmc->nomux)
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@ -262,6 +262,7 @@
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#define INT_24XX_UART1_IRQ 72
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#define INT_24XX_UART2_IRQ 73
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#define INT_24XX_UART3_IRQ 74
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#define INT_24XX_MMC_IRQ 83
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/* Max. 128 level 2 IRQs (OMAP1610), 192 GPIOs (OMAP730) and
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* 16 MPUIO lines */
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@ -461,6 +461,20 @@ enum omap24xx_index {
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K15_24XX_UART3_TX,
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K14_24XX_UART3_RX,
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/* MMC/SDIO */
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G19_24XX_MMC_CLKO,
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H18_24XX_MMC_CMD,
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F20_24XX_MMC_DAT0,
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H14_24XX_MMC_DAT1,
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E19_24XX_MMC_DAT2,
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D19_24XX_MMC_DAT3,
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F19_24XX_MMC_DAT_DIR0,
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E20_24XX_MMC_DAT_DIR1,
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F18_24XX_MMC_DAT_DIR2,
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E18_24XX_MMC_DAT_DIR3,
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G18_24XX_MMC_CMD_DIR,
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H15_24XX_MMC_CLKI,
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/* Keypad GPIO*/
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T19_24XX_KBR0,
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R19_24XX_KBR1,
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